Semiconductor Memory Device Hydrogen Blocking Structure
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Solution Overview
Problem
The yield of semiconductor memory devices is hindered by hydrogen supply to transistors during the stacking process, causing fluctuations in transistor characteristics and reducing device yield.
Innovation Solution
The implementation of a blocking portion between the memory and peripheral circuit regions, with an insulating layer in contact with the substrate, reduces hydrogen supply to transistors and includes dummy gates and contact plugs designed to prevent etching expansion during manufacturing, thereby enhancing yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If transistors are stacked during manufacturing, then device functionality is achieved, but hydrogen supply to transistors causes characteristic fluctuations and reduces yield
Solution Approach 1:
A blocking portion is introduced as an intermediary structure between the memory cell array and peripheral circuits. This blocking portion includes an insulating layer that acts as a mediator to prevent hydrogen generated during stacking processes from reaching transistor gates, thereby eliminating the harmful hydrogen supply while maintaining device functionality
Solution Approach 2:
The harmful hydrogen supply path is extracted and removed from the system by introducing the blocking portion. The insulating layer in the blocking portion specifically targets and removes the hydrogen contamination issue from the transistor region, separating the hydrogen generation source from the sensitive transistor areas
2Stability of the object's composition
If blocking portion is introduced to reduce hydrogen supply, then transistor characteristics are stabilized, but device structure becomes more complex
Solution Approach 1:
The device structure is segmented into distinct functional regions: a memory cell array region, a peripheral circuit region, and a blocking portion region. This segmentation allows the blocking portion to be strategically placed only where hydrogen protection is needed, stabilizing transistor characteristics without unnecessarily complicating the entire device structure
Solution Approach 2:
The blocking portion with its insulating layer is applied locally only in regions where hydrogen protection is required (between memory cell array and peripheral circuits), rather than throughout the entire device. This local application stabilizes transistor characteristics in critical areas while minimizing the overall structural complexity
3Manufacturing precision
If dummy gates and contact plugs are added to prevent etching expansion, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
Dummy gates are formed in advance during the manufacturing process as preliminary structures that prevent etching expansion before the actual transistor structures are completed. These dummy gates act as placeholders that control the etching process boundaries, ensuring manufacturing precision is achieved from the outset rather than requiring complex corrective measures later
Data Source
AI summary
A semiconductor memory device includes a substrate including a first region, as second region, a third region and a fourth regions, the first region including a memory cell array, the second region including a circuit for controlling the memory cell array, the third region separating the first region and the second region, and the fourth region surrounding the third region, a first transistor provided in the second region, a second transistor provided in the third region between the first region and the first transistor, a third transistor provided in the third region between the first transistor and the second transistor, and a first insulating layer including a first portion disposed above the first to third transistors, and a second portion disposed in contact with the substrate between the second transistor and the third transistor.