Semiconductor Memory Device Hydrogen Radical Blocking Insulating Layer

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Solution Overview

Problem

In the manufacturing process of three-dimensionally arranged semiconductor memory devices, the peripheral circuit is often damaged due to the diffusion of hydrogen radicals, leading to high defect densities and reduced manufacturing yield.

Innovation Solution

The use of a second insulating layer with a higher blocking rate for hydrogen radicals, specifically silicon nitride, is implemented between the substrate and the peripheral circuit, divided into portions to effectively prevent hydrogen radical penetration and protect the circuit.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Shape

If the memory cell array is formed after the peripheral circuit is formed on a substrate, then the three-dimensional memory structure can be created, but the peripheral circuit may be damaged in the forming process of the memory cell array

Engineering Contradiction:
Improvethree-dimensional memory structureVSAvoidperipheral circuit integrity
Core Design Contradiction:
ShapeVSReliability

Solution Approach 1:

The insulating layer is divided into multiple segments: a first insulating layer covering the memory cell array region, and a second insulating layer covering the peripheral circuit region. This segmentation allows each layer to be optimized for its specific function - the first layer enables 3D memory formation while the second layer protects the peripheral circuit from damage during the forming process

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The second insulating layer acts as an intermediary protective barrier between the memory cell array formation process and the peripheral circuit. It prevents harmful factors (such as hydrogen radical diffusion) generated during memory cell formation from reaching and damaging the peripheral circuit, while still allowing the overall device to function as an integrated structure

Inventive Principle:
Principle #24Intermediary (Mediator)

2Shape

If the peripheral circuit is formed before the memory cell array, then the three-dimensional structure can be built, but hydrogen radical diffusion damages the peripheral circuit leading to high defect densities

Engineering Contradiction:
Improvethree-dimensional memory structureVSAvoiddefect density in peripheral circuit
Core Design Contradiction:
ShapeVSManufacturing precision

Solution Approach 1:

The second insulating layer is formed preliminarily before the memory cell array formation process begins. This preliminary protective layer is in place to prevent hydrogen radical diffusion from the subsequent memory cell array formation process, thereby preventing defects in the peripheral circuit before they can occur

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The insulating layer structure, particularly the second layer, converts the potentially harmful formation process of the memory cell array into a beneficial opportunity. By using this process to form the insulating layers first, the same process that could generate harmful hydrogen radicals is instead used to create the protective barrier that will prevent those radicals from damaging the peripheral circuit

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution significantly reduces defect densities in the peripheral circuit, improving the manufacturing yield by effectively blocking hydrogen radical diffusion and protecting the circuit from damage.

Implementation Method 1

the second insulating layer blocks a diffusion of hydrogen radicals with a higher rate than the first insulating layer

Methodology Applied
Scientific EffectDiffusion blocking: Diffusion Barrier

Data Source

PatentUS11069710B2Semiconductor memory device
Publication Date: 2021.07.20 KIOXIA CORP
  • US11069710B2 patent drawing
  • US11069710B2 patent drawing
  • US11069710B2 patent drawing

AI summary

A semiconductor memory device includes a memory plane including a plurality of electrode layers stacked on a substrate and a semiconductor layer extending through the plurality of electrode layers in a stacking direction thereof, a circuit provided on the substrate around the memory plane, a first insulating layer covering the circuit, and a second insulating layer including a first portion and a second portion between the substrate and the first insulating layer. The first portion is provided along an outer edge of the memory plane, and the second portion is spaced from the first portion and is provided on the circuit side. The first insulating layer includes a part in contact with the substrate between the first portion and the second portion, and the first insulating layer blocks a diffusion of hydrogen radicals with a higher rate than the second insulating layer.