Semiconductor Memory Device Insulating Pillars
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Solution Overview
Problem
Existing semiconductor memory devices face challenges in preventing structure collapse during the manufacturing process, particularly when forming high-aspect-ratio memory trenches, which can lead to layer stack buckling and reduced device reliability.
Innovation Solution
Incorporating insulating pillars between semiconductor layers and word line pillars, arranged at specific distances and pitches, to support the layer stack and prevent collapse, while also simplifying the manufacturing process by using the same process for both memory cell and select gate contact regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If high-aspect-ratio memory trenches are formed to increase storage density, then storage capacity is improved, but structure collapse and layer stack buckling occur during manufacturing
Solution Approach 1:
The patent divides the continuous layer stack into discrete segments by inserting insulating pillars at regular intervals between the semiconductor layers and word line pillars. This segmentation prevents the continuous structure from collapsing by creating independent supported sections, allowing high-aspect-ratio memory trenches to be formed without compromising overall structure stability.
Solution Approach 2:
Insulating pillars are introduced as intermediary elements between the semiconductor layers and word line pillars. These pillars act as mechanical support structures that prevent direct contact and potential collapse between the layered components, maintaining structural integrity during the formation of high-aspect-ratio memory trenches.
2Reliability
If insulating pillars are added to support the layer stack, then structure stability is improved, but device complexity increases
Solution Approach 1:
The patent merges the formation of insulating pillars with the existing manufacturing process for forming memory cell contact regions. By using the same etching and filling processes for both memory cell contacts and insulating pillars, the patent avoids adding separate processing steps, thereby maintaining manufacturing simplicity while achieving structural support.
Solution Approach 2:
The insulating pillars serve multiple functions: they provide mechanical support to prevent layer stack collapse, act as spacers to maintain proper spacing between components, and are formed using the same process that creates memory cell contacts. This multi-functionality reduces the need for additional specialized components or processes.
Data Source
AI summary
According to one embodiment, a semiconductor memory device includes the following structure. First and second semiconductor layers extend in a first direction. The second semiconductor layer is stacked apart from the first semiconductor layer in a second direction. First, second and third conductive layers and a first insulating layer extend in the second direction and intersect the first and second semiconductor layers. The first insulating layer is provided at a first distance from the first conductive layer in the first direction. The second conductive layer is provided at the first distance from the first insulating layer in the first direction. The third conductive layer is provided at the first distance from the second conductive layer in the first direction.