3D Semiconductor Memory Structure with Isolation Trenches
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Solution Overview
Problem
Current semiconductor structures face challenges in achieving high memory density and large storage capacity while maintaining a small size, as they struggle to efficiently stack multiple memory planes in a three-dimensional configuration.
Innovation Solution
The semiconductor structure features vertically stacked memory structures with C-shaped cross-sections separated by isolation trenches, along with interlaced conductive and insulating layers, and epitaxial structures that connect memory structures to the substrate, allowing for increased memory density and efficient electrical connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If vertically stacked memory structures are implemented to increase storage capacity, then memory density is improved, but device complexity increases
Solution Approach 1:
The memory device is divided into multiple independent memory planes stacked vertically, with each plane containing separate memory structures. Isolation trenches partition these planes, allowing independent fabrication and operation of each plane while achieving high overall density without excessive complexity in any single plane
Solution Approach 2:
The patent transitions from two-dimensional memory arrangement to three-dimensional stacking of multiple memory planes vertically. This dimensional change increases storage capacity per unit area while maintaining manageable complexity through the use of isolation trenches that separate and simplify the structure of each individual plane
2Quantity of substance
If multiple memory planes are stacked to achieve larger storage capacity, then memory storage capacity is improved, but manufacturing precision requirements increase
Solution Approach 1:
Each memory plane is fabricated as a separate, standardized unit with consistent layer thicknesses and structural dimensions. The isolation trenches provide physical separation that allows each plane to be manufactured with standard precision requirements, avoiding the need for ultra-precise multi-plane integration
Solution Approach 2:
The conductive and insulating layers are formed with predetermined thicknesses and patterns before memory structure formation. This preliminary layer preparation establishes a standardized foundation that simplifies subsequent manufacturing steps and maintains consistent precision across multiple stacked planes
3Quantity of substance
If isolation trenches are used to separate memory structure clusters, then memory density is improved, but device complexity increases
Solution Approach 1:
Isolation trenches divide the memory device into discrete clusters of memory structures, creating a modular architecture. This segmentation increases density by enabling tighter packing of functional elements while the regular, repeating pattern of trenches maintains manufacturing simplicity and reduces design complexity
Solution Approach 2:
Instead of isolating individual memory structures, the patent uses isolation trenches to define and separate clusters of structures. This inverted approach of cluster-based isolation reduces the total number of isolation features needed compared to individual structure isolation, thereby reducing device complexity while maintaining high density
Data Source
AI summary
A semiconductor structure and a manufacturing method are provided. The semiconductor structure includes a substrate, conductive layers, insulating layers, a memory structure including first memory structure clusters and second memory structure clusters, isolation trenches, and common source trenches. The conductive layers and the insulating layers are interlaced and stacked on the substrate. Each first memory structure cluster include first memory structures and each first memory structure cluster include second memory structures. The first and second memory structures penetrate the conductive layers and the insulating layers. Each isolation trench is formed between a first memory structure cluster and a second memory structure cluster. The isolation trenches span horizontally on the substrate in a discontinuous manner separated by gaps. Common source trenches are formed on the substrate that run substantially parallel with the isolation trenches.