Semiconductor Memory Device Latch-Type Differential Amplifier
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Solution Overview
Problem
NAND-type flash memory devices face limitations in data sensing speed due to lower cell current compared to NOR-type flash memory, making it difficult to achieve high-speed data access and storage, especially when adapting for large capacity and high-speed systems.
Innovation Solution
A semiconductor memory device with a latch-type differential amplifier that detects current differences between information cells and reference cells, using transistors and capacitors to amplify and offset currents, allowing for faster data sensing and storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If NAND-type flash memory uses conventional sense amplifiers to detect cell current, then data storage capacity can be increased, but data sensing speed deteriorates due to low cell current levels
Solution Approach 1:
The memory cell array is divided into information cells and reference cells, allowing differential sensing that amplifies the small current differences between cells, thereby enabling high-speed data sensing while maintaining large storage capacity
Solution Approach 2:
Reference cells are introduced as intermediaries to facilitate differential current sensing. The reference cells provide a baseline current level that enables the sense amplifier to detect and amplify the small current differences from information cells, solving the speed limitation imposed by low absolute current levels
2Quantity of substance
If NAND-type flash memory uses multi-value data storage scheme to increase storage capacity, then data density improves, but read time increases due to multiple sensing operations required
Solution Approach 1:
Reference cells are pre-configured with specific current levels that correspond to different data states. This preliminary setup enables the differential sense amplifier to directly read multi-value data in a single sensing operation, eliminating the need for multiple sequential sensing operations and reducing read time
3Device complexity
If conventional current sensing method is used in NAND-type flash memory, then device simplicity is maintained, but sensing precision deteriorates due to inability to detect small current differences
Solution Approach 1:
Reference cells serve as intermediaries that enable precise current difference detection. By comparing the current from information cells against the reference current from reference cells, the sense amplifier can detect very small current differences with high precision while adding only moderate circuit complexity
Solution Approach 2:
The sensing method transitions from detecting absolute current levels to detecting current differences. This parameter change enables the sense amplifier to achieve high measurement precision by focusing on the differential signal rather than the small absolute current values, improving detection capability without excessive complexity increase
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances data sensing speed and storage capacity by effectively amplifying current differences, enabling faster data access and storage in NAND-type flash memory devices, bridging the performance gap with NOR-type flash memory.
Implementation Method 1
a latch-type of differential amplifier configured to detect a current difference between a selected information cell and a selected reference cell in the memory cell array; a pair of transistors attached to the differential amplifier, the pair of transistors being on-driven to keep the differential amplifier inactive in a stationary state and off-driven to make the differential amplifier active at a sensing time, whereby the current difference is amplified as a drain voltage difference of the pair of transistors
Implementation Method 2
a pair of capacitors coupled to the pair of transistors to hold voltages corresponding to the respective currents of two current paths of the differential amplifier prior to inputting the current difference, and apply a certain offset voltage to the pair of transistors at the sensing time
Data Source
AI summary
A memory device including a memory cell array with information cells and reference cells arranged and a sense amplifier configured to sense data stored in the memory cell array, wherein the sense amplifier has a latch-type of differential amplifier configured to detect a current difference between a selected information cell and a selected reference cell, a pair of transistors attached to the differential amplifier, the pair of transistors being on-driven to keep the differential amplifier inactive in a stationary state and off-driven to make the differential amplifier active at a sensing time, whereby the current difference is amplified as a drain voltage difference of the pair of transistors, and a pair of capacitors hold voltages corresponding to the respective currents of two current paths of the differential amplifier prior to inputting the current difference, and apply a certain offset voltage to the pair of transistors at the sensing time.