Semiconductor Memory Device Metal Layer Contact Resistance
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Solution Overview
Problem
In the manufacturing of three-dimensional semiconductor memory devices, the formation of memory holes and the reduction of contact resistance between semiconductor layers pose challenges, affecting the memory capacity and efficiency of the device.
Innovation Solution
A semiconductor memory device design that includes a metal layer between the source layer and the stacked body, reducing contact resistance and allowing for a more compact arrangement of memory cells by providing a contact plug outside the memory cell part, thereby enhancing memory capacity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory holes are formed from top surface to conductive layer in three-dimensional structure, then memory capacity is improved, but contact resistance between semiconductor layers increases
Solution Approach 1:
A metal layer is introduced as an intermediary between the semiconductor layer and the conductive layer. This metal layer serves as a mediator that reduces contact resistance at the interface where the semiconductor layer contacts the conductive layer, thereby improving electrical connection reliability while maintaining the three-dimensional memory structure.
Solution Approach 2:
The patent transitions from a planar contact structure to a vertical three-dimensional structure by forming memory holes extending from the top surface through the stacked body to the conductive layer. This dimensional change allows increased memory capacity by utilizing vertical space, while the metal layer compensates for the contact resistance issue introduced by this structural change.
2Manufacturing precision
If contact plug is provided outside memory cell part, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
The contact structure is segmented into two parts: a contact plug formed within the memory hole inside the memory cell part, and an additional contact plug formed outside the memory cell part. This segmentation allows the external contact plug to be optimized for electrical connection and manufacturing precision, while the internal contact plug maintains the memory cell structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The metal layer reduces contact resistance and allows for a more efficient and dense packing of memory cells, improving the memory capacity and manufacturing process controllability of the semiconductor memory device.
Implementation Method 1
the metal layer reduces contact resistance between the source layer and the stacked body
Data Source
AI summary
A semiconductor memory device includes a first semiconductor layer; a stacked body including a plurality of electrode layers stacked in a first direction; a metal layer provided in the first direction between the first semiconductor layer and the stacked body; a second semiconductor layer extending in the first direction through the stacked body and the metal layer, and being electrically connected to the first semiconductor layer.