Semiconductor Memory Device N-Type Impurity Regions Suppress Leak Currents
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Solution Overview
Problem
Semiconductor memory devices face challenges in preventing leak currents due to cracks in the insulating layer between the semiconductor substrate and through-electrodes, which can occur when the substrate is supplied with different voltages, leading to electrical isolation issues.
Innovation Solution
The implementation of N-type impurity regions on the rear-face of the semiconductor substrate, which are separated and extend along the outer peripheral surfaces of the through-electrodes, creates a depletion layer that isolates the substrate and suppresses leak currents even if cracks occur in the insulating layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an insulating layer is provided between the semiconductor substrate and through-electrodes, then electrical isolation is achieved, but cracks in the insulating layer can cause leak currents
Solution Approach 1:
An impurity region (first intermediary) is introduced between the semiconductor substrate and the through-electrode to act as a mediator that suppresses leak currents. This impurity region creates a depletion layer that prevents harmful electrical leakage while maintaining the insulating function, effectively resolving the contradiction between achieving electrical isolation and preventing leak currents through cracks in the insulating layer.
2Ease of operation
If different voltages are supplied to the substrate, then device operation is enabled, but voltage differences cause cracks in the insulating layer
Solution Approach 1:
The impurity region is预先 (in advance) formed in the semiconductor substrate to create a protective depletion layer before voltage differences cause cracks in the insulating layer. This beforehand cushioning structure prevents the propagation of cracks and suppresses leak currents that would otherwise occur due to mechanical stress from voltage differences, allowing device operation while maintaining insulating layer integrity.
3Reliability
If through-electrodes extend through the substrate, then electrical connection is achieved, but cracks near the substrate interface cause leakage
Solution Approach 1:
The impurity region serves as an intermediary structure positioned between the semiconductor substrate and the through-electrode at the critical interface region. This intermediary creates a depletion layer that blocks leak currents at the substrate interface while maintaining the electrical connection function of the through-electrode, effectively resolving the contradiction between achieving reliable electrical connection and preventing interface leakage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses leak currents between through-electrodes, ensuring electrical isolation and preventing voltage-related leakage, even when cracks form in the vicinity of the substrate and through-hole interface.
Implementation Method 1
implementation of N-type impurity regions on the rear-face of the semiconductor substrate, which are separated and extend along the outer peripheral surfaces of the through-electrodes, creates a depletion layer that isolates the substrate and suppresses leak currents
Data Source
AI summary
A semiconductor memory device comprises: a semiconductor substrate comprising a first and a second surface; a first and a second electrode provided on a first surface side; a third and a fourth electrode provided on a second surface side; a first through-electrode connected to the first and the third electrode; a second through-electrode connected to the second and the fourth electrode; and a first insulating layer comprising a first and a second portion. The semiconductor substrate comprises: a first impurity region of N type facing a surface of the first through-electrode via the first portion; a second impurity region of N type facing a surface of the second through-electrode via the second portion; and a third impurity region of P type provided between the first and the second impurity region.