Semiconductor Memory Device P-Type Region Leakage Current
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Solution Overview
Problem
The existing semiconductor memory devices face issues with leakage current and saturation of erase voltage due to the interaction between the depletion layer and the damaged region during the erase operation, leading to potential operation failures.
Innovation Solution
Incorporating a p-type semiconductor region between the damaged region and the n-type semiconductor region on the semiconductor substrate, which helps in preventing the spread of the depletion layer and inhibiting the saturation of the erase voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the semiconductor substrate is used during erase operation, then the erase voltage is applied, but the depletion layer interacts with the damaged region causing leakage current and voltage saturation
Solution Approach 1:
A p-type semiconductor region is introduced as an intermediary layer between the damaged region and the n-type semiconductor region. This intermediate p-type region acts as a barrier that prevents the depletion layer from directly interacting with the damaged region during erase operations, thereby blocking the leakage current path while allowing the erase voltage to function properly.
Solution Approach 2:
The p-type semiconductor region inherently provides the function of blocking the depletion layer through its own electrical properties. The region's p-type conductivity naturally creates a potential barrier that prevents the depletion layer from spreading into the damaged region, eliminating the need for additional active control mechanisms.
2Reliability
If the depletion layer spreads during erase operation, then the erase voltage is depleted, but this causes saturation of erase voltage leading to operation failure
Solution Approach 1:
The p-type semiconductor region serves as a protective intermediary that prevents the depletion layer from reaching the damaged region. By blocking the depletion layer's progression, the p-type region prevents the erase voltage from being depleted through leakage paths, thereby maintaining voltage stability and preventing saturation during erase operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the reliability of the semiconductor memory device by reducing leakage current and ensuring stable erase voltage operation, thereby preventing potential failures.
Implementation Method 1
the interaction between the depletion layer and the damaged region during the erase operation
Implementation Method 2
leakage current and saturation of erase voltage
Data Source
AI summary
A semiconductor memory device, includes: a first region including a memory cell array; and a second region including a peripheral circuit. The second region includes a semiconductor substrate having a first surface and a second surface. The semiconductor substrate includes: a semiconductor region between the first and second surfaces; an n-type semiconductor region provided on the first surface and higher in donor concentration than the semiconductor region; a damaged region provided on the second surface; and a p-type semiconductor region provided between the damaged region and the n-type semiconductor region, closer to the second surface than the n-type semiconductor region in a direction from the first surface toward the second surfaces of the semiconductor substrate, and higher in acceptor concentration than the semiconductor region.