Semiconductor Memory Page Size Adaptation via Switching
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Solution Overview
Problem
Existing semiconductor memory technologies require separate core structures for different page sizes, leading to the need for separate chip manufacturing based on page size specifications.
Innovation Solution
A semiconductor memory design that utilizes a control unit to generate control signals for input/output switches and page change switches, allowing the same core structure to operate in various page sizes by connecting or disconnecting segment input/output lines, enabling flexible page size implementation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If separate core structures are designed for different page sizes, then the semiconductor memory can meet specific page size specifications, but the manufacturing complexity increases and separate chips must be produced for each page size
Solution Approach 1:
The core structure is divided into multiple unit memory blocks, each capable of independent operation. These blocks can be selectively activated and connected based on the required page size, allowing a single core to support multiple page sizes without requiring separate dedicated structures for each configuration
Solution Approach 2:
The core structure incorporates dynamic switching mechanisms that allow the architecture to reconfigure itself based on the required page size. Control signals dynamically enable or disable specific unit memory blocks and adjust their connections, transforming a static structure into an adaptable one that can meet different specification requirements
2Manufacturing precision
If separate chips are manufactured for different page sizes, then each chip can be optimized for its specific page size, but the manufacturing process becomes more complex and less flexible
Solution Approach 1:
A single chip design is created that can universally support multiple page sizes through the use of unit memory blocks and switching mechanisms. This multi-functional core structure eliminates the need to manufacture separate chips for different page sizes, simplifying the manufacturing process while maintaining the ability to meet various specification requirements
3Ease of manufacture
If a single core structure is used for multiple page sizes, then manufacturing flexibility increases, but the control complexity and switching mechanisms required increase
Solution Approach 1:
The control signals are generated in advance based on the required page size configuration. The switching mechanisms are pre-configured to respond to specific control signals, allowing the core structure to be set up for the desired page size before operation begins. This preliminary configuration reduces the complexity of real-time control during memory operations
Data Source
AI summary
A semiconductor memory in accordance with an embodiment includes: a control unit configured to generate a plurality of second control signals in response to a page size signal and a plurality of first control signals; a plurality of input/output switches configured to be coupled to each of a plurality of unit memory blocks and activated in response to the plurality of second control signals; and a plurality of page change switches configured to couple data lines of the plurality of unit memory blocks in response to the page size signal.