Semiconductor Memory Device Pre-Drain Voltage Initialization

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Solution Overview

Problem

Semiconductor memory devices experience a program disturbance phenomenon in unselected memory strings during programming operations, where the potential levels of unselected memory strings are not properly initialized, leading to potential errors in data retention and storage.

Innovation Solution

A semiconductor memory device with a control logic that performs a verify operation and applies a pre-drain select line voltage to the drain select lines of both selected and unselected memory blocks, ensuring that the potential levels of memory strings are initialized to prevent program disturbances.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If program operation is performed on selected memory block, then data is programmed into selected memory block, but program disturbance occurs in unselected memory strings due to improper initialization of potential levels

Engineering Contradiction:
Improvedata retention reliabilityVSAvoidprogram disturbance in unselected memory strings
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies a pre-drain select line voltage to drain select lines of both selected and unselected memory blocks before performing the program operation. This preliminary action initializes the potential levels of memory strings in unselected blocks, preventing program disturbance from occurring during the subsequent programming process.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies a pre-drain select line voltage to counteract the potential program disturbance effect before it can occur. By pre-initializing the potential levels of memory strings in unselected blocks, the harmful effect of program disturbance is prevented in advance during the program operation.

Inventive Principle:
Principle #9Preliminary anti-action

2Measurement precision

If verify operation is performed on all memory blocks, then programming accuracy is ensured, but operation time increases due to additional verification steps

Engineering Contradiction:
Improveprogramming verification accuracyVSAvoidprogram operation time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent applies the pre-drain select line voltage to both selected and unselected memory blocks, which is more extensive than traditionally necessary. This excessive action ensures that all memory strings are properly initialized, preventing any potential program disturbance in unselected blocks while maintaining programming verification accuracy.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS9899093B2Semiconductor memory device having memory strings coupled to bit lines and operating method thereof
Publication Date: 2018.02.20 SK HYNIX INC
  • US9899093B2 patent drawing
  • US9899093B2 patent drawing
  • US9899093B2 patent drawing

AI summary

There are provided a semiconductor memory device and an operating method thereof. A semiconductor memory device includes a memory cell array including a plurality of memory blocks, a peripheral circuit for performing a program operation on a selected memory block among the plurality of memory blocks, and a control logic for controlling the peripheral circuit to perform the program operation. The control logic controls the peripheral circuit to perform a verify operation during the program operation and then apply a pre-drain select line voltage to drain select lines of the selected memory block and unselected memory blocks.