Semiconductor Memory Device With Flexible Refresh Skip Area

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Solution Overview

Problem

Volatile semiconductor memory devices, such as DRAM, face inefficiencies in refresh operations, leading to increased power consumption and reduced performance, especially when not all memory areas require frequent refreshes, like frame buffer areas which store image data temporarily.

Innovation Solution

Implementing a semiconductor memory device with a refresh skip area that selectively and adaptively changes its size, allowing for controlled refresh operations based on temperature and operational modes, thereby skipping unnecessary refreshes and optimizing the number of rows activated and the refresh period.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If refresh operations are performed on all memory areas, then data reliability is maintained, but power consumption increases

Engineering Contradiction:

Improvedata retentionVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The memory array is divided into multiple banks, and each bank can be independently controlled for refresh operations. The refresh control circuit can selectively enable or disable refresh for specific banks based on whether they contain valid data, allowing partial refresh of only the necessary portions of memory.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different refresh policies are applied to different memory regions. The refresh control circuit identifies which banks contain valid data and applies refresh operations only to those specific regions, rather than uniformly refreshing the entire memory array, thus reducing overall power consumption while maintaining data reliability where needed.

Inventive Principle:

Principle #3Local quality

2Use of energy by moving object

If refresh operations are skipped in frame buffer areas, then power consumption is reduced, but data reliability may be compromised

Engineering Contradiction:

Improvepower consumptionVSAvoiddata retention

Core Design Contradiction:

Use of energy by moving objectVSReliability

Solution Approach 1:

The refresh control circuit dynamically adjusts refresh operations based on the validity status of data in each bank. When a bank is identified as containing valid frame buffer data, refresh is skipped; when invalid or stale data is detected, refresh is performed. This dynamic adaptation allows the system to optimize power consumption while maintaining data reliability based on actual conditions.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The system uses feedback from the validity detection mechanism to control refresh operations. The refresh control circuit receives information about which banks contain valid data and uses this feedback to selectively enable or disable refresh for those banks, ensuring that refresh is performed only when necessary for maintaining data reliability.

Inventive Principle:

Principle #23Feedback

3Ease of operation

If the refresh skip area size is fixed, then control simplicity is maintained, but adaptability to different operational modes is reduced

Engineering Contradiction:

Improvecontrol simplicityVSAvoidoperational mode flexibility

Core Design Contradiction:

Ease of operationVSAdaptability or versatility

Solution Approach 1:

The refresh skip area size is made dynamic rather than fixed. The refresh control circuit can adjust the size and location of refresh skip areas based on the current operational mode and validity detection results. This allows the system to adapt to different scenarios (such as different frame buffer configurations or temperature conditions) while maintaining relatively simple control logic through automated adjustment.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The refresh control circuit is designed to handle multiple operational modes and scenarios through a unified control mechanism. It can adaptively configure refresh skip areas for different types of memory access patterns, temperature conditions, and operational requirements, making the system universally applicable across various scenarios without requiring separate control circuits for each mode.

Inventive Principle:

Principle #6Universality (Multi-functionality)

4Speed

If more rows are activated simultaneously for refresh, then refresh speed is improved, but power consumption increases

Engineering Contradiction:

Improverefresh speedVSAvoidpower consumption

Core Design Contradiction:

SpeedVSUse of energy by moving object

Solution Approach 1:

Instead of refreshing all memory rows simultaneously or in full batches, the refresh control circuit performs partial refresh operations only on the specific banks that contain valid data. This partial action approach completes necessary refresh tasks with fewer activated rows, reducing power consumption while maintaining adequate refresh speed for the actual data that needs to be preserved.

Inventive Principle:

Principle #16Partial or excessive action

Data Source

PatentUS11887650B2Semiconductor memory device managing flexible refresh skip area

Publication Date: 2024.01.30 SAMSUNG ELECTRONICS CO LTD

AI summary

A semiconductor memory device having a flexible refresh skip area includes a memory cell array including a plurality of rows to store data, a row decoder connected to the memory cell array, a refresh area storage unit to store a beginning address and an end address of a memory area that is to be refreshed in which the memory area that is to be refreshed does not include a refresh skip area having a size is selectively and/or adaptively changed, and a refresh control circuit connected to the row decoder and the refresh area storage unit. The refresh control circuit controls a refresh operation for the area that is to be refreshed and not for the refresh skip area.