Semiconductor Memory Device for Reset-Free Page Erase and Write

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Solution Overview

Problem

Existing memory cells face issues with decreased operation margin and data retention characteristics due to variations in floating body channel voltage and discharge of signal charges, particularly in dynamic flash memory cells without capacitors.

Innovation Solution

A memory device with a semiconductor element design that performs continuous page erase and write operations without a reset operation, utilizing specific voltage applications to manage positive holes in the semiconductor base, and includes a structure with isolated gate conductor layers and parallel arranged word and plate lines.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If continuous page erase and write operations are performed without reset operation, then productivity is improved, but device complexity increases due to voltage management requirements

Engineering Contradiction:
Improverewriting speedVSAvoidvoltage application control
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements continuous page erase and write operations without resetting the plate line voltage. The plate line maintains a high voltage state throughout the entire sequence, allowing impact ionization to continuously generate positive holes that are immediately utilized for both erase and write operations. This eliminates the need for voltage cycling and reset operations, thereby improving productivity while the voltage management is handled through coordinated control of other lines (word line, bit line, source line) to achieve the desired operations.

Inventive Principle:
Principle #20Continuity of useful action

2Productivity

If plate line voltage is maintained at high level during continuous operations, then productivity is improved, but energy consumption increases

Engineering Contradiction:
Improveoperation speedVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by stationary object

Solution Approach 1:

The patent converts the continuous high voltage state on the plate line, which would normally be considered wasteful energy consumption, into a beneficial continuous source of impact ionization. The sustained high voltage continuously generates positive holes in the semiconductor base, which are then selectively removed or retained to perform both erase and write operations. This transforms what would be energy waste into a continuous useful action that eliminates the need for repeated voltage cycling and reset operations.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Productivity

If impact ionization is continuously utilized, then productivity is improved, but heat generation increases

Engineering Contradiction:
Improverewriting efficiencyVSAvoidheat generation
Core Design Contradiction:
ProductivityVSTemperature

Solution Approach 1:

The patent maintains continuous impact ionization by keeping the plate line at high voltage throughout the operation sequence. This continuous generation of positive holes allows immediate sequential erase and write operations without interruption or reset, maximizing productivity. The heat generated from continuous impact ionization is accepted as a necessary byproduct of achieving high-speed continuous rewriting operations.

Inventive Principle:
Principle #20Continuity of useful action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enhances operation margin and data retention by efficiently managing positive holes through continuous operations, reducing power consumption and enabling high-speed rewriting without the need for a reset operation.

Implementation Method 1

capacitive coupling between a gate electrode and the channel

Methodology Applied
Scientific EffectCapacitive coupling: Capacitance

Implementation Method 2

a group of positive holes and electrons generated by an impact ionization phenomenon in a channel by a current

Methodology Applied
Scientific EffectImpact ionization: Impact Force

Data Source

PatentUS12396154B2Memory device using semiconductor element
Publication Date: 2025.08.19 UNISANTIS ELECTRONICS SINGAPORE PTE LTD
  • US12396154B2 patent drawing
  • US12396154B2 patent drawing
  • US12396154B2 patent drawing

AI summary

A memory device includes pages in a column direction on a substrate and memory cells in each page in a row direction in plan view. Each memory cell includes a semiconductor base, first and second impurity regions, connected to a source line and a bit line, respectively, at both ends of the semiconductor base, and first and second gate conductor layers, one of which is connected to a word line and the other of which is connected to a plate line. A continuous operation of a page erase operation and a page write operation is performed by controlling voltages applied to the source line, the bit line, the word line, and the plate line without performing a reset operation for returning the voltage applied to the plate line to a ground voltage.