Semiconductor Memory Reading Circuit Security Mode Switching

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Solution Overview

Problem

Semiconductor devices, such as microcomputers with flash memory, face security challenges as they can be easily accessed and data can be leaked when in an operation mode that allows external writing and reading, necessitating enhanced security measures to prevent unauthorized access.

Innovation Solution

A semiconductor device is designed with a memory region using both reference current and complementary reading methods, controlled by a control circuit and mode controller, which switches between reading methods based on a security state register, preventing data from being read from erased regions and ensuring data security.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If a flash memory device operates in a mode that allows external reading and writing, then ease of operation is improved, but security deteriorates as unauthorized access and data leakage become possible

Engineering Contradiction:
Improveease of external accessVSAvoiddata security
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent implements dynamic switching between two reading methods (complementary reading and reference current reading) based on the operational mode. In normal operation mode, complementary reading is used for standard access. When security protection is activated, the system switches to reference current reading, which renders erased data unreadable. This dynamic adaptation allows the same device to provide both ease of operation and security protection as needed.

Inventive Principle:
Principle #15Dynamics

2Ease of operation

If complementary reading method is used for reading data, then ease of operation is improved, but security deteriorates because data before erasure can be read from erased regions

Engineering Contradiction:
Improvereading capabilityVSAvoiddata protection after erasure
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent changes the reading parameter by switching between two distinct reading methods. The complementary reading method compares currents from paired memory cells, while the reference current reading method compares memory cell current against a fixed reference current. By changing the reading parameter based on security requirements, the system can prevent reading of erased data when reference current reading is activated, thus protecting data security while maintaining normal reading capability when needed.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If reference current reading method is used, then security is improved by preventing reading of erased data, but device complexity increases due to need for mode control

Engineering Contradiction:
Improvesecurity protectionVSAvoidcontrol circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent designs the reading circuit to perform multiple functions through a single unified structure. The same reading circuit can operate in complementary reading mode for normal access or switch to reference current reading mode for security protection. This multi-functionality is achieved by adding a mode control mechanism that redirects the reading operation without requiring entirely separate circuits, thus providing security protection while limiting the increase in device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10127989B2Semiconductor device
Publication Date: 2018.11.13 RENESAS ELECTRONICS CORP
  • US10127989B2 patent drawing
  • US10127989B2 patent drawing
  • US10127989B2 patent drawing

AI summary

An object of the present disclosure is to provide a semiconductor having high security. A semiconductor device includes: a memory region having a plurality of memory cells capable of storing data; a read circuit capable of switching a reference current reading method of reading data by comparing current flowing a memory cell to be read in the memory region with a reference current, and a complementary reading method of reading data by comparing currents flowing in first and second memory cells in which complementary data to be read in the memory region is stored; a register setting a security state; a mode controller setting a mode; and a control circuit controlling the reference current reading method and the complementary reading method of reading the data in the read circuit on the basis of a signal of setting a mode from the mode controller and a value of the register.