Semiconductor Memory Read Speed via Selective Bit Line Kick
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Solution Overview
Problem
Current semiconductor memory technologies face challenges in speeding up read operations due to RC delay in word line voltage application and overdischarge issues in bit lines, leading to prolonged stabilization times and potential erroneous readings.
Innovation Solution
The semiconductor memory employs a configuration with first and second memory cells, word lines, bit lines, and sense amplifiers, where a controller applies specific voltages to speed up read operations by using a kick operation for the word line and bit lines, selectively omitting kick operations for bit lines determined to be in an on-state to prevent overdischarge and reduce error bits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If kick operation is applied to word line to speed up voltage application, then read operation speed is improved, but RC delay and overdischarge issues cause prolonged stabilization time
Solution Approach 1:
The patent applies preliminary kick operations to the word line before the actual read operation to pre-charge the word line to the required voltage level. This preliminary action reduces the RC delay effect during the subsequent read operation, allowing faster voltage application across the memory array without causing prolonged stabilization issues.
Solution Approach 2:
The patent selectively applies kick operations only to specific word lines that require voltage boosting, rather than uniformly applying kick operations to all word lines. This localized approach speeds up read operations for affected word lines while minimizing unnecessary voltage fluctuations and stabilization time for other word lines.
2Stability of the object's composition
If kick operation is applied to bit line to stabilize voltage quickly, then voltage stabilization is improved, but overdischarge occurs leading to erroneous readings
Solution Approach 1:
The patent incorporates feedback mechanisms that monitor bit line voltage levels during read operations. Based on the detected voltage state, the control logic selectively determines whether to apply kick operations to specific bit lines. This feedback control prevents overdischarge by avoiding kick operations on bit lines that are already in an on-state, thereby maintaining reading accuracy while achieving voltage stabilization when needed.
3Reliability
If kick operation is selectively omitted for bit lines in on-state to prevent overdischarge, then reading accuracy is improved, but voltage stabilization time increases
Solution Approach 1:
The patent performs preliminary detection of bit line states before applying kick operations. By identifying which bit lines are already in an on-state through preliminary sensing, the system can selectively omit kick operations for those bit lines, preventing overdischarge and maintaining reading accuracy while applying kick operations only where necessary for voltage stabilization.
Data Source
AI summary
A semiconductor memory includes memory cells, a word line and bit lines of the memory cells, sense amplifiers connected to the bit lines, respectively, and a controller. Each sense amplifier includes first, second, and third transistors. The third transistor has one end connected to each of the first and second transistors, and the other end connected to a corresponding bit line. During a read operation, at a first time of a first period during which the controller applies a first read voltage to the word line, the controller applies a first voltage higher than ground voltage to the first transistor, and a second voltage to the second transistor. Also, at the first time, a first sense amplifier applies a voltage to a first bit line through its first and third transistors, and a second sense amplifier applies a voltage to a second bit line through tis second and third transistors.