Self-Refresh Controller for DRAM Bank Rotation
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Solution Overview
Problem
Semiconductor memory devices, such as DRAM, face high power consumption during refresh operations, especially when in standby mode, due to leakage currents and inefficient data movement between memory banks, which affects their usage in mobile electronic products.
Innovation Solution
A semiconductor memory device with a self-refresh controller that selectively refreshes memory pages based on bitmapped refresh information, allowing only necessary pages to be refreshed, thereby reducing power consumption and optimizing the refresh process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If refresh operation is performed in DRAM in standby mode, then data leakage is compensated, but power consumption increases
Solution Approach 1:
The memory system is divided into multiple memory banks, and the refresh operation is segmented to operate on only one bank at a time during standby mode. This allows other banks to remain in a lower-power state while still maintaining data integrity across the entire memory system through periodic rotation of refresh operations.
Solution Approach 2:
The refresh operation parameters are dynamically adjusted based on the standby mode state. When in standby, the refresh interval and duration are modified to reduce power consumption while still preventing data leakage, transitioning from full-refresh parameters to reduced-refresh parameters appropriate for low-power operation.
2Loss of energy
If data movement between memory banks is performed, then empty banks can be omitted from refresh, but power and time are consumed for data movement
Solution Approach 1:
Data movement between memory banks is performed periodically rather than continuously. The system rotates through different banks for refresh operations at predetermined intervals, allowing data to be moved only when necessary to enable bank skipping, thereby reducing overall power consumption compared to continuous data shuffling.
3Ease of operation
If each memory bank is controlled independently, then refresh granularity is improved, but control complexity increases
Solution Approach 1:
While individual memory banks can be independently controlled for refresh operations, the control logic is merged into a unified bank-rotation mechanism. This single control structure manages multiple banks sequentially, providing fine-grained control over individual banks without requiring separate complex control circuits for each bank.
Data Source
AI summary
A semiconductor memory device includes at least one memory bank including a plurality of memory cells and a self-refresh controller configured to generate a refresh address and to output a row address for a page to be refreshed based on the refresh address. The semiconductor memory device drives the at least one memory bank based on the row address and selectively refreshes pages in the at least one memory bank in response to the row address.


