3D Semiconductor Memory Stabilizing Leaning Stacked Structure
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Solution Overview
Problem
The challenge in manufacturing three-dimensional nonvolatile semiconductor memory devices is the difficulty in substituting conductive layers for nitride layers, which often results in a leaning stacked structure, making it hard to maintain a stable architecture.
Innovation Solution
The semiconductor memory device employs a structure with alternating first and second channel columns, offset channel layers, and spacers between them, along with insulating and conductive layers, to stabilize the stacked structure and simplify the manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conductive layers are substituted for nitride layers in the manufacturing process, then the integration capacity is enhanced, but the stacked structure becomes unstable and leans
Solution Approach 1:
Spacer layers are introduced as intermediary elements between adjacent channel columns to prevent direct contact and reduce stress. These spacers act as buffer zones that maintain the structural integrity of the stacked architecture while allowing the conductive layers to be substituted, thereby preventing the leaning issue while preserving integration capacity enhancements
Solution Approach 2:
The patent employs composite material structures by combining multiple materials with different mechanical properties in the stacked layers. This includes using both nitride and oxide layers in specific configurations, where each material contributes different structural characteristics that collectively enhance overall stack stability during the substitution process
2Adaptability or versatility
If multiple conductive layers are stacked to surround channel layers, then device functionality is improved, but manufacturing complexity increases
Solution Approach 1:
The manufacturing process is segmented into distinct stages: first forming insulating layers and first conductive layers around first channel layers, then separately forming second insulating and conductive layers around second channel layers. This segmentation allows each layer type to be processed independently, reducing overall manufacturing complexity while maintaining full device functionality
Solution Approach 2:
Instead of forming all conductive layers simultaneously in a complex single-step process, the patent inverts the approach by forming insulating layers first as a foundation, then adding conductive layers in alternating sequences. This reversed sequence simplifies the manufacturing workflow while achieving the same functional outcome
Data Source
AI summary
A semiconductor memory device includes: a plurality of first channel columns including a plurality of first channel layers that are arranged in a direction and offset by their centers; a plurality of second channel columns alternately arranged with the plurality of first channel columns and having a plurality of second channel layers that are arranged in the direction and offset by their centers; first insulating layers and first conductive layers alternately stacked to surround the first channel layers; second insulating layers and second conductive layers stacked to surround the second channel layers; and spacers placed between the first channel columns and the second channel columns and interposed between the first conductive layers and the second conductive layers.