3D Semiconductor Memory Stack Support Pattern Fabrication
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Solution Overview
Problem
The integration of two-dimensional or planar semiconductor memory devices is limited by the expensive equipment required for fine pattern formation, making it difficult to increase memory density, while three-dimensional semiconductor memory devices offer a potential solution but require innovative fabrication methods to enhance reliability and efficiency.
Innovation Solution
A method of fabricating a semiconductor device involving the formation of a mold structure with alternately stacked sacrificial and dielectric patterns, patterning to create preliminary stack structures, and replacing sacrificial patterns with conductive patterns, while maintaining a support pattern to reduce substrate stress and prevent structural defects, such as leaning or collapse.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If two-dimensional or planar semiconductor memory devices are used, then manufacturing process is simpler, but integration density is limited due to expensive equipment requirements for fine pattern formation
Solution Approach 1:
The patent transitions from two-dimensional planar memory structures to three-dimensional vertically stacked memory cells. Multiple memory cells are stacked along the vertical direction (third direction) to increase integration density without requiring finer lateral patterning, thereby avoiding the need for expensive fine pattern formation equipment while achieving higher capacity
2Device complexity
If three-dimensional semiconductor memory devices are fabricated without support structures, then manufacturing process is simpler, but substrate warpage and structural defects increase
Solution Approach 1:
A support structure is introduced as an intermediary element between the substrate and the vertically stacked memory cells. This support structure provides mechanical reinforcement to prevent substrate warpage and structural defects during fabrication, while being designed to be removable after serving its protective function, thus balancing reliability improvement with process complexity
3Device complexity
If sacrificial patterns are removed without replacement, then structure formation is simpler, but structural defects such as leaning or collapse occur
Solution Approach 1:
A replacement pattern is formed in advance to occupy the space previously held by sacrificial patterns before they are completely removed. This preliminary action provides structural support during critical fabrication steps, preventing leaning or collapse of the vertically stacked memory cells, and ensures proper spacing and alignment are maintained throughout the manufacturing process
Data Source
AI summary
Disclosed are semiconductor devices and methods of fabricating the same. The method comprises forming on a substrate a mold structure including a plurality of sacrificial patterns and a plurality of dielectric patterns that are alternately stacked, patterning the mold structure to form a plurality of preliminary stack structures extending in a first direction, forming on the preliminary stack structures a support pattern that extends in a direction intersecting the first direction and extends across the preliminary stack structures, and replacing the sacrificial patterns with conductive patterns to form a plurality of stack structures from the preliminary stack structures. The support pattern remains on the stack structures.