3D Semiconductor Memory Device with Step-Shaped Holes
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Solution Overview
Problem
The high cost and limitations of fine pattern forming equipment and techniques in 2-dimensional semiconductor memory devices hinder further integration, while 3-dimensional semiconductor devices present new challenges in manufacturing and operation.
Innovation Solution
A semiconductor memory device with a 3-dimensional structure is developed, featuring a substrate with first and second cell regions, slimming regions, and electrode structures with step-shaped holes and slits, allowing for reduced separation of electrodes and minimized wiring lines, thereby reducing the device's size and manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If 2-dimensional semiconductor memory devices use fine pattern forming equipment and techniques to increase integration, then the degree of integration is improved, but the manufacturing cost becomes prohibitively high
Solution Approach 1:
The patent transitions from 2-dimensional planar memory cell arrangement to 3-dimensional vertically stacked electrode structures. Multiple electrode structures are stacked in the vertical direction (third direction) on the substrate, allowing memory cells to be arranged in three dimensions. This dimensional change enables increased integration density without requiring further reduction of pattern dimensions, thereby avoiding the need for prohibitively expensive fine pattern forming equipment.
2Quantity of substance
If 3-dimensional semiconductor devices are implemented to increase integration density, then the degree of integration is improved, but the device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent divides the memory device into multiple independent electrode structures that are stacked vertically. Each electrode structure can be formed and processed separately, and then they are combined through the slit formation process. This segmentation allows for modular manufacturing, reducing the overall complexity compared to forming a single large 3-dimensional structure. The slit further divides each electrode structure into first and second electrodes, creating manageable segments that simplify the manufacturing process.
Solution Approach 2:
By stacking electrode structures in the vertical direction (third direction) rather than expanding in the planar direction, the patent achieves high integration density without proportionally increasing manufacturing complexity. The vertical stacking allows standard 2-dimensional fabrication processes to be applied repeatedly to create 3-dimensional structures, maintaining process simplicity while achieving three-dimensional integration.
3Device complexity
If electrode structures are separated in 3-dimensional memory devices, then wiring lines can be simplified, but the device size increases
Solution Approach 1:
The patent utilizes the vertical dimension (third direction) to stack multiple electrode structures, allowing wiring connections to be made vertically through the substrate thickness rather than requiring long horizontal wiring lines across the device area. This vertical connectivity in the third dimension reduces the planar footprint and overall device size while simplifying the wiring architecture compared to 2-dimensional layouts.
Data Source
AI summary
A semiconductor memory device includes a substrate defined with a first cell region, a slimming region extending from the first cell region in a first direction and a second cell region extending from the slimming region in the first direction; first and second electrode structures each including electrodes which are stacked on the substrate, and disposed to be separated from each other in a second direction crossing with the first direction, with a slit interposed therebetween; and a plurality of step-shaped holes disposed in the slimming region along the first direction, and respectively formed in the first and second electrode structures. Each of the step-shaped holes includes first step structures which face each other in the first direction, are symmetrical to each other and are separated by the slit and second step structures which face each other in the second direction and are symmetrical to each other.