Semiconductor Memory Device With Surrounding Conductive Layers
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor memory devices face challenges in achieving high integration and efficient storage capacity due to limitations in memory cell arrangement and manufacturing processes, leading to issues with voltage breakdown and memory structure exposure during processing.
Innovation Solution
The semiconductor memory device configuration includes a memory cell array with memory blocks and subblocks arranged in a uniform pattern, using conductive layers and insulating layers to surround semiconductor layers, and a specific manufacturing method that forms memory structures after separating the sacrificing layer, preventing exposure and destruction during etching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory structures are arranged in a uniform pattern with conductive layers surrounding semiconductor layers, then storage capacity and integration density are improved, but manufacturing complexity and risk of voltage breakdown increase
Solution Approach 1:
The memory device is divided into multiple memory blocks, each containing memory strings with semiconductor layers surrounded by conductive layers. This segmentation allows for modular manufacturing and reduces overall complexity while increasing storage capacity through systematic repetition of standardized units.
Solution Approach 2:
Conductive layers are nested around semiconductor layers to form cylindrical memory structures. This nested configuration enables three-dimensional integration, increasing storage density without proportionally increasing manufacturing complexity, as the same layering process is applied repeatedly.
2Quantity of substance
If memory structures are arranged in a uniform pattern with conductive layers surrounding semiconductor layers, then integration density is improved, but risk of voltage breakdown during manufacturing increases
Solution Approach 1:
A sacrificial layer is introduced as an intermediary element during manufacturing. This sacrificial layer is positioned between adjacent memory structures to prevent voltage breakdown during the formation process. After the conductive layers are successfully formed, the sacrificial layer is removed, leaving the desired high-density structure without the temporary protection element.
3Reliability
If sacrificing layer is used to prevent voltage breakdown, then reliability is improved, but manufacturing process complexity increases
Solution Approach 1:
The sacrificial layer is formed in advance before the conductive layers are deposited. This preliminary action ensures that voltage breakdown is prevented during the critical formation stage. The sacrificial layer is then removed in a subsequent step, leaving the final high-reliability structure. This approach separates the protection function from the final device structure.
Solution Approach 2:
The sacrificial layer is temporarily introduced to enable reliable manufacturing, then discarded after serving its protective function. This temporary element allows the main structure to be formed with high reliability, and its removal simplifies the final device while maintaining the benefits of the protective measure.
Data Source
AI summary
A semiconductor memory device includes: a first conductive layer and a first insulating layer extending in a first direction, these layers being arranged in a second direction intersecting the first direction; a first semiconductor layer opposed to the first conductive layer, and extending in a third direction intersecting the first and second directions; a second semiconductor layer opposed to the first conductive layer, extending in the third direction; a first contact electrode connected to the first semiconductor layer; and a second contact electrode connected to the second semiconductor layer. In a first cross section extending in the first and second directions, an entire outer peripheral surface of the first semiconductor layer is surrounded by the first conductive layer, and an outer peripheral surface of the second semiconductor layer is surrounded by the first conductive layer and the first insulating layer.