Semiconductor Memory Threshold Control for Neighbor Word-Line Interference
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Solution Overview
Problem
The issue of neighbor word-line interference (NWI) in NAND memory devices leads to wider threshold voltage distributions and increased fail bit counts, exacerbated by higher memory cell densities and multi-value writing, which affects the margin between threshold voltage distributions.
Innovation Solution
A semiconductor memory device and control method that includes a control circuit to adjust the threshold voltage of memory cells based on threshold voltage information of adjacent cells, using a looped program and verification operation, and applying a weak program pulse to minimize the spread of threshold voltage distributions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cell density is increased by decreasing the gap between gates, then memory cell density is improved, but neighbor word-line interference increases causing threshold voltage distribution to spread
Solution Approach 1:
The patent applies preliminary action by performing a first program operation on a first word line before performing a second program operation on a second word line. This sequential programming approach prevents threshold voltage spread in previously programmed word lines by completing all programming operations on a word line before moving to the next adjacent word line, thereby eliminating NWI effects.
2Quantity of substance
If multi-value writing progresses to higher number of bits, then storage capacity is improved, but neighbor word-line interference increases causing threshold voltage distribution to spread
Solution Approach 1:
The patent applies preliminary action by performing a first program operation on a first word line before performing a second program operation on a second word line. This sequential programming approach prevents threshold voltage spread in previously programmed word lines by completing all programming operations on a word line before moving to the next adjacent word line, thereby eliminating NWI effects.
3Productivity
If conventional programming is used without considering adjacent word lines, then programming speed is improved, but fail bit count increases due to threshold voltage spread
Solution Approach 1:
The patent applies preliminary action by performing a first program operation on a first word line before performing a second program operation on a second word line. This sequential programming approach prevents threshold voltage spread in previously programmed word lines by completing all programming operations on a word line before moving to the next adjacent word line, thereby eliminating NWI effects.
Solution Approach 2:
The patent applies feedback by using verification operations to determine whether programming of the first word line is completed before proceeding to program the second word line. This feedback mechanism ensures that programming operations are properly synchronized to prevent NWI, thereby reducing fail bit counts while maintaining programming efficiency.
Data Source
AI summary
A semiconductor memory device includes a memory cell array including memory cells, word lines connected to the cells, bit lines connected to the cells, and a control circuit configured to execute, in response to a command sequence for writing data into a first memory cell connected to a first word line, a loop one or more times, each loop including a program operation for writing data into the first memory cell and a verification operation for verifying the data. The sequence indicates a level of a threshold voltage to be set to a second memory cell connected to a second word line adjacent to the first word line. The control circuit is configured to, after exiting the loop, determine whether to execute an operation to adjust a threshold voltage of the first memory cell based on the level of the threshold voltage to be set in the second memory cell.