Semiconductor Memory Internal Voltage Generating Circuit
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Solution Overview
Problem
In semiconductor memory devices, the increasing chip size and operating speed lead to unstable high voltage levels due to time delays and insufficient operation margins, causing reliability and stability issues as the high voltage VPP is not maintained effectively, especially when the bank is enabled and the voltage level is below a predetermined level.
Innovation Solution
An auxiliary pumping circuit is introduced, which performs pumping operations in response to both the pumping determining signal and a bank active pulse signal, ensuring stable high voltage levels by enabling the auxiliary pumping unit when the voltage level is below the predetermined level, even with time delays or insufficient margins.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the chip size and operating speed are increased, then the storage capacity and performance are improved, but the high voltage level becomes unstable due to time delays and insufficient operation margins
Solution Approach 1:
The auxiliary pumping circuit is configured to perform pumping operations in advance or concurrently with the main pumping circuit. When a bank activation signal is detected, the auxiliary pumping circuit immediately begins pumping to generate high voltage, rather than waiting for the main pumping circuit to complete its operation. This preliminary action compensates for time delays and ensures the high voltage reaches the required level before the bank becomes active.
Solution Approach 2:
The pumping circuit is divided into two independent segments: a main pumping circuit and an auxiliary pumping circuit. Each circuit can operate independently or concurrently. The auxiliary pumping circuit is specifically designed to handle situations where the main pumping circuit cannot provide sufficient voltage in time, thereby segmenting the voltage generation responsibility to ensure reliability under different operating conditions.
2Speed
If the operating frequency is increased, then the performance is improved, but the operation margin for generating high voltage is reduced
Solution Approach 1:
The auxiliary pumping circuit is triggered by the bank activation signal to perform pumping operations before the bank actually becomes active. This preliminary pumping action ensures that the high voltage is generated with sufficient margin even when the operating frequency is high and time windows are narrow. The auxiliary circuit runs in parallel with or ahead of the main pumping circuit to guarantee voltage availability.
3Area of stationary object
If the capacitor size is reduced, then the chip size is reduced, but it becomes difficult to stabilize the voltage level of high voltage VPP
Solution Approach 1:
The auxiliary pumping circuit performs pumping operations in advance to ensure the high voltage reaches the required level before the bank becomes active. This preliminary action compensates for the reduced capacitance by proactively generating the necessary voltage, rather than relying on the capacitor to maintain voltage during sudden discharge events. The auxiliary circuit ensures voltage stability despite smaller capacitor sizes by preemptively replenishing the voltage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The auxiliary pumping circuit maintains stable high voltage levels, improving the reliability and stability of semiconductor memory devices by addressing sudden high voltage consumption and time delays, ensuring the voltage level remains stable even during short activation durations and increased usage.
Implementation Method 1
a pumping circuit configured to perform a pumping operation in response to the pumping determining signal and an active signal
Implementation Method 2
an auxiliary pumping circuit configured to perform the pumping operation in response to the pumping determining signal and a bank active pulse signal
Data Source
AI summary
Semiconductor memory device with internal voltage generating circuit and method for operating the same includes a high voltage detecting circuit configured to detect a voltage level of a high voltage and activate a pumping determining signal when the voltage level of the high voltage is below a predetermined level; a pumping circuit configured to perform a pumping operation in response to the pumping determining signal and an active signal; and an auxiliary pumping circuit configured to perform the pumping operation in response to the pumping determining signal and a bank active pulse signal.