Semiconductor Memory Word Line Driver Area Reduction

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Solution Overview

Problem

In semiconductor memory apparatus, the narrow pitch between word lines limits the arrangement of row decoders and common word line drivers, leading to increased area requirements and preventing reduction of the overall memory cell area due to the need for extensive word line driver layout.

Innovation Solution

A configuration where a row decoder is placed centrally, with first and second cell arrays on either side, and a wiring layer short-circuits word lines corresponding to a specified row address between the cell arrays, allowing a common word line driver to drive adjacent word lines, eliminating the need for separate drivers on each side.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If a common word line driver is used to drive both sides of word lines, then the area of word line driver is reduced, but the pitch between word lines is too narrow for arranging the row decoder part and common word line driver, making it impossible to arrange word line to pass through the row decoder part

Engineering Contradiction:

Improvearea of word line driverVSAvoidarrangement of row decoder part

Core Design Contradiction:

Area of stationary objectVSEase of manufacture

Solution Approach 1:

The patent introduces a new wiring layer (third wiring layer) above the existing first and second wiring layers to route word lines through the row decoder part. This dimensional addition allows word lines to pass over the row decoder without interfering with the narrow pitch between memory cell word lines, enabling the common word line driver configuration while maintaining compact layout.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent divides the wiring structure into multiple layers: first wiring layer for bit lines, second wiring layer for word lines in cell arrays, and third wiring layer for word lines passing through the row decoder part. This segmentation allows independent routing of different signal types without interference, solving the layout constraint caused by narrow pitch.

Inventive Principle:

Principle #1Segmentation

2Reliability

If word line drivers are arranged on left and right sides to drive word lines, then word lines can be driven, but the row decoder area increases relatively and the overall memory cell part area cannot be reduced

Engineering Contradiction:

Improveword line driving capabilityVSAvoidrow decoder area

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges the functions of left and right word line drivers into a single common word line driver located in the row decoder part. The third wiring layer enables this merged driver to drive word lines on both sides by routing them through the center, eliminating the need for separate drivers on left and right sides and reducing overall area.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The common word line driver in the row decoder part serves multiple functions: it drives word lines for both the left and right cell arrays. This multi-functional design replaces what would traditionally require two separate drivers, reducing the area occupied by word line driving circuitry.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS7692942B2Semiconductor memory apparatus

Publication Date: 2010.04.06 RENESAS ELECTRONICS CORP

AI summary

A semiconductor memory that includes a row decoder part, a first cell array placed on either side of the row decoder part, a second cell array placed on the other side of the row decoder part, and a wiring layer that short-circuits word lines corresponding to a specified row address on the first cell array with word lines corresponding to a specified row address on the second cell array.