Semiconductor Memory Read Control Without Repeated Word Line Discharge
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Solution Overview
Problem
Existing semiconductor memory devices face challenges in optimizing read operations, particularly when repeated read operations are performed on the same word lines, leading to increased RC delays and reduced read speed due to unnecessary word line discharge steps.
Innovation Solution
Implementing a controller that differentiates between two types of read commands: one that includes a word line discharge operation and another that omits it, based on the type of read command and the success of error correction, thereby optimizing read speed by reducing unnecessary discharge steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a word line discharge operation is performed during every read operation, then reliability is improved, but read speed deteriorates due to increased RC delays
Solution Approach 1:
The patent extracts the word line discharge operation from the standard read operation sequence. Instead of performing discharge after every read, the discharge operation is selectively removed when reading from the same word line in consecutive operations. This allows the system to maintain reliability when needed while eliminating unnecessary discharge steps that cause RC delays, thereby improving read speed.
Solution Approach 2:
The patent introduces dynamic control of the word line discharge operation based on the read command type and previous operation status. The controller dynamically determines whether to perform discharge by checking if the current read targets the same word line as the previous read. This dynamic adjustment optimizes the balance between reliability and speed adaptively.
2Speed
If word line discharge operation is omitted for repeated reads on same word line, then read speed is improved, but reliability may deteriorate due to accumulated charge
Solution Approach 1:
The patent implements feedback control where the controller monitors the read command type and determines whether the current read operation targets the same word line as the previous operation. Based on this feedback information, the controller selectively applies the discharge operation only when necessary (when switching between different word lines), ensuring reliability is maintained while avoiding unnecessary operations that would reduce speed.
3Reliability
If discharge command is transmitted after every read operation, then word line charge is properly cleared, but time is lost due to additional command transmission and execution
Solution Approach 1:
The patent extracts the discharge command transmission from the mandatory sequence of every read operation. By identifying when consecutive reads target the same word line, the system removes the redundant discharge command transmission and execution, thereby reducing the time lost to command overhead while maintaining proper charge clearance when needed.
Data Source
AI summary
A semiconductor memory device includes a memory cell array, a peripheral circuit, and a control logic. The memory cell array includes a plurality of memory cells. The peripheral circuit performs a read operation on selected memory cells, among the plurality of memory cells. The control logic controls the read operation of the peripheral circuit in response to a read command that is received from an external device and determines whether to perform a discharge operation of word lines that are connected to the plurality of memory cells based on a type of the read command.