3D Semiconductor Memory Device Zigzag Sub-Interconnections
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Solution Overview
Problem
The integration degree of two-dimensional semiconductor memory devices is limited due to the high cost of equipment required for fine pattern formation, necessitating the development of three-dimensional semiconductor memory devices with improved integration and reliability.
Innovation Solution
A semiconductor memory device with a three-dimensional structure, featuring string select lines, vertical pillars, sub-interconnections, bitlines, and contact plugs arranged in a zigzag manner to increase integration density and reliability, where the sub-interconnections connect vertical pillars to bitlines and string select lines, with upper contact plugs positioned between sub-interconnections and bitlines to reduce effective area and prevent misalignment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If fine pattern forming technique is improved to increase integration degree of two-dimensional memory device, then integration degree is improved, but manufacturing cost increases due to extremely expensive equipment
Solution Approach 1:
The patent transitions from a two-dimensional memory structure to a three-dimensional structure by extending bitlines vertically through multiple layers. This dimensional change allows integration degree to increase without requiring progressively more expensive fine pattern forming equipment, as the additional capacity comes from stacking rather than lateral scaling.
2Quantity of substance
If three-dimensional structure is adopted to increase integration degree, then integration degree is improved, but device complexity increases
Solution Approach 1:
The three-dimensional structure is segmented into distinct functional layers: string select lines at the top, vertical pillars extending downward, sub-interconnections in the middle layer, and bitlines at the bottom. This segmentation organizes the complex 3D structure into manageable, functionally-separated components that are easier to manufacture and analyze.
Solution Approach 2:
The vertical pillars serve multiple functions simultaneously: they act as channels for charge transport, provide structural support for the stacked architecture, and enable electrical connection between different horizontal layers. This multi-functionality reduces the need for additional specialized components, thereby managing complexity.
3Reliability
If upper contact plugs are positioned closer to odd and even string select lines, then misalignment is prevented and reliability is improved, but manufacturing precision requirements increase
Solution Approach 1:
The upper contact plugs are positioned asymmetrically with respect to the odd and even string select lines, with different distances to each. This asymmetric positioning creates a deliberate offset that prevents simultaneous misalignment with both types of lines, thereby improving reliability without requiring ultra-precise symmetric positioning.
Data Source
AI summary
A semiconductor memory device includes string select lines extending in a first direction, vertical pillars connected to the string select lines, sub-interconnections on the string select lines, bitlines connected to the vertical pillars through the sub-interconnections, and upper contact plugs connecting the sub-interconnections to the bitlines. The string select lines include odd and even string select lines alternately arranged in a second direction. The sub-interconnections each connect a pair of vertical pillars respectively connected to one of the odd string select lines and one of the even string select lines that are adjacent to each other. Each of the upper contact plugs is between one of the sub-interconnections and one of the bitlines. Each of the upper contact plugs is arranged more adjacent to one string select line of the adjacent string select lines to which the pair of vertical pillars connected by the sub-interconnections are connected.