Semiconductor Mesa Stripe Etching for Stress Reduction
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Solution Overview
Problem
The challenge is to manufacture semiconductor devices with reduced mesa stripe widths while preventing substrate splitting at the peripheries of trenches, which occurs due to stress concentration at angular portions formed by anisotropic dry etching.
Innovation Solution
The method involves forming a mesa stripe with a semiconductor layer and using a combination of isotropic and anisotropic etching steps to create concaves with circular-arc sectional shapes in the semiconductor layer, ensuring smooth connections between trench bottom and side surfaces, thereby avoiding angular portions and reducing stress during chip separation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the width of the process mesa is reduced to decrease parasitic impedance, then the frequency of modulation of the semiconductor laser element is improved, but the manufacturing precision of the mesa stripe becomes more difficult to achieve
Solution Approach 1:
The etching process is segmented into two distinct steps: first isotropic etching to form concaves with circular-arc sections at the bottom of trenches, then anisotropic etching to complete the trench formation. This segmentation allows each step to optimize for its specific function, achieving both narrow mesa width and precise formation without angular portions
Solution Approach 2:
The isotropic etching step is performed as a preliminary action before the anisotropic etching step. This preliminary action creates the concaved bottom portions with circular-arc sections that prevent angular portions from forming during the subsequent anisotropic etching, thereby preventing stress concentration before it occurs
2Manufacturing precision
If anisotropic dry etching is used to form trenches with high precision, then the manufacturing precision of the mesa stripe is improved, but stress concentration occurs at angular portions causing substrate splitting
Solution Approach 1:
The isotropic etching step creates concaves with circular-arc sectional shapes at the bottom of trenches. This curvature replaces the angular portions that would normally form with flat bottom and side surfaces, eliminating stress concentration points while maintaining the precision of trench formation
Solution Approach 2:
The etching process parameters are changed by switching from purely anisotropic etching to a two-step process involving isotropic etching first. This parameter change transforms the trench geometry from having angular portions to having concaved bottoms with circular-arc sections, fundamentally changing the stress distribution
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the formation of semiconductor devices with reduced mesa stripe widths, minimizing substrate splitting and improving yield by eliminating stress concentration at trench peripheries during chip separation.
Implementation Method 1
an isotropic etching step of performing isotropic etching on the semiconductor layer exposed through the mask pattern so that concaves having a circular-arc sectional shape are formed in the semiconductor layer
Implementation Method 2
an anisotropic etching step of performing anisotropic etching on the semiconductor layer through the mask pattern after the isotropic etching step so that etching progresses to the semiconductor substrate
Implementation Method 3
a mass transport step of causing, after the anisotropic etching step, by heating the semiconductor substrate, a mass transport phenomenon on the semiconductor substrate exposed at bottom surfaces of trenches formed in the anisotropic etching step
Data Source
AI summary
A method of manufacturing a semiconductor device, includes a step of forming, on a semiconductor substrate, a mesa stripe including an active layer, and a semiconductor layer covering the mesa stripe, a masking step of forming, on the semiconductor layer, a mask pattern through which the semiconductor layer is exposed on opposite sides of the mesa stripe, an isotropic etching step of performing isotropic etching on the semiconductor layer exposed through the mask pattern so that concaves having a circular-arc sectional shape are formed in the semiconductor layer, and an anisotropic etching step of performing anisotropic etching on the semiconductor layer through the mask pattern after the isotropic etching step so that etching progresses to the semiconductor substrate.


