Semiconductor Mesh Structure for Trench Fabrication

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Solution Overview

Problem

The challenge in semiconductor device fabrication is the formation of trenches with high aspect ratios, where residual conductive material layers on the sidewalls can lead to improper conduction and affect electrical performance.

Innovation Solution

A method involving the formation of a mesh structure using a conductive material layer and fin structures, where a non-selective etching process with controlled etching selectivity is used to pattern the material layer, ensuring no residue remains on the sidewalls of the trench, and dielectric pillars are used to support the structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If very high etching selectivity is used to form trenches with high aspect ratio, then the trench formation is successful, but residual material layer remains on the sidewall of the trench

Engineering Contradiction:
Improvetrench aspect ratioVSAvoidresidual material layer
Core Design Contradiction:
Manufacturing precisionVSObject-generated harmful factors

Solution Approach 1:

Instead of using high etching selectivity to form the trench (conventional approach), the patent inverts the approach by using non-selective etching to remove material. The trench is formed by removing sacrificial fins rather than etching through a mask, which eliminates the residual material problem inherent in selective etching processes.

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The patent performs preliminary actions by forming sacrificial fins and conducting planarization before final trench formation. The conductive material layer is deposited and planarized in advance, and the sacrificial fins are removed first, allowing the trench to be formed without residual material from the etching process itself.

Inventive Principle:
Principle #10Preliminary action

2Stability of the object's composition

If residual material layer remains on the sidewall of the trench, then the trench structure is maintained, but improper conduction occurs between semiconductor devices

Engineering Contradiction:
Improvetrench structureVSAvoidelectrical performance
Core Design Contradiction:
Stability of the object's compositionVSReliability

Solution Approach 1:

The patent extracts the problematic residual material layer by using a completely different formation mechanism. Instead of etching through material that leaves residues, the trench is formed by removing sacrificial fins through non-selective etching, ensuring clean walls without conductive residues that could cause improper conduction.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent converts the potential harm of non-selective etching (which could remove unwanted material) into a benefit by using it to remove sacrificial fins cleanly. The non-selective nature of the etching, which would normally be considered a disadvantage, becomes advantageous for eliminating residual material and ensuring clean trench walls.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively prevents residual material layers on the sidewalls of trenches, enhancing the electrical performance of semiconductor devices by ensuring proper conduction and structural integrity.

Implementation Method 1

The conductive material layer and the fin structures are patterned to form a mesh structure... performing a non-selective etching process... an etching selectivity of the conductive material layer and the fin structures is controlled to be 0.7 to 1.3

Methodology Applied
Scientific EffectEtching:

Data Source

PatentUS9553104B2Semiconductor device and method of fabricating the same
Publication Date: 2017.01.24 MACRONIX INTERNATIONAL CO LTD
  • US9553104B2 patent drawing
  • US9553104B2 patent drawing
  • US9553104B2 patent drawing

AI summary

Provided is a fabricating method of a semiconductor device, including the following. Fin structures are formed on a substrate, and the adjacent fin structures have an opening therebetween. A conductive material layer is formed to cover the fin structures and fill the opening. The conductive material layer and the fin structures are patterned to form a mesh structure. The mesh structure includes first strips extending in a first direction and second strips extending in a second direction. The first strips and the second strips intersect each other, and the mesh structure has holes. The first strips are located on the substrate at positions corresponding to the fin structures. The second strips are located on the substrate, and the conductive material layer in the second strips spans the fin structures. The hole is formed in the opening and surrounded by the first strips and the second strips.