Direct Semiconductor-Metal Bonding Without Intermediate Layers
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Solution Overview
Problem
The joining of semiconductor and metal substrates using intermediate layers like solders or epoxies results in residual stresses, thermal expansion issues, and reliability problems due to differing coefficients of thermal expansion, leading to device failure and performance degradation.
Innovation Solution
A method for direct bonding of semiconductor and metal substrates without intermediate layers, utilizing surface preparation techniques such as plasma exposure, low-temperature annealing, and the application of thin metal films to achieve strong, low-resistance electrical and thermal interfaces.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If intermediate layers like solders or epoxies are used to join semiconductor and metal substrates, then adhesive strength is sufficient for practical applications, but residual stresses and thermal expansion issues arise due to differing coefficients of thermal expansion
Solution Approach 1:
The patent removes the intermediate joining layer (solder, epoxy, glass frit) from the bonding system, enabling direct bonding between semiconductor and metal substrates. This extraction eliminates the source of residual stresses and thermal expansion mismatches while maintaining adequate adhesive strength through direct substrate contact and bonding interface optimization.
Solution Approach 2:
The patent changes the bonding parameters by performing direct bonding at controlled temperatures and using surface preparation techniques (plasma treatment, chemical etching) to modify surface properties. This allows achieving strong bonds without intermediate layers while managing thermal expansion differences through controlled bonding conditions.
2Strength
If soldering materials are used to mate semiconductor to metal substrate, then adhesive strength is provided, but the temperature of the mating process must be performed at approximately the melting or alloying temperature of the soldering material, which is typically well over one-hundred degrees Celsius
Solution Approach 1:
The patent eliminates the soldering material intermediate layer, allowing direct bonding between substrates at lower temperatures. This removes the requirement to heat to solder melting temperatures while still achieving adequate bond strength through direct interface bonding.
Solution Approach 2:
The patent changes the bonding temperature parameter from high temperatures (solder melting points >100°C) to lower temperatures achievable through direct bonding methods, while compensating for bond strength through surface preparation and controlled bonding conditions.
3Strength
If intermediate layers are used for joining, then adhesive strength is sufficient, but large built-in residual stresses result that can have detrimental effects on semiconductor device performance
Solution Approach 1:
The patent removes the intermediate layer that generates residual stresses, enabling direct bonding between substrates. This eliminates the source of built-in stresses while maintaining adequate adhesive strength through optimized direct interface bonding.
Solution Approach 2:
The patent converts the potential harm of direct bonding (which might be expected to create stress) into a benefit by using controlled surface preparation and bonding conditions that actually reduce residual stresses compared to intermediate layer methods, while eliminating the harmful effects of solder/epoxy layers.
4Reliability
If direct bonding of semiconductor and metal substrates is performed without intermediate layers, then residual stresses and thermal expansion issues are eliminated, but achieving strong bonds requires advanced surface preparation techniques
Solution Approach 1:
The patent applies preliminary surface preparation actions (plasma treatment, chemical etching, mechanical polishing) before bonding to ensure surfaces are clean and reactive. This preliminary action enables strong direct bonds without intermediate layers, achieving high reliability while managing manufacturing complexity through standardized pre-treatment processes.
5Strength
If intermediate layers are used for joining semiconductor to metal substrate, then adhesive strength is provided, but the bond strength may be insufficient under certain conditions
Solution Approach 1:
The patent removes the intermediate layer that may fail under stress, enabling direct bonding that provides more reliable and consistent bond strength. Direct bonding eliminates the weak interface that can form between intermediate layers and substrates, improving overall bond reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces thermal resistance, enhances reliability, and eliminates the risks of stress-induced failures, allowing for efficient heat management and electrical connectivity while maintaining low operational temperatures.
Implementation Method 1
utilizing surface preparation techniques such as plasma exposure
Implementation Method 2
low-temperature annealing
Implementation Method 3
reduces thermal resistance
Implementation Method 4
direct bonding of semiconductor and metal substrates without intermediate layers
Data Source
AI summary
A method of wafer or substrate bonding a substrate made of a semiconductor material with a substrate made from a metallic material is disclosed. The method allows the bonding of the two substrates together without the use of any intermediate joining gluing, or solder layer(s) between the two substrates. The method allows the moderate or low temperature bonding of the metal and semiconductor substrates, combined with methods to modify the materials so as to enable low electrical resistance interfaces to be realized between the bonded substrates, and also combined with methods to obtain a low thermal resistance interface between the bonded substrates, thereby enabling various useful improvements for fabrication, packaging and manufacturing of semiconductor devices and systems.