Semiconductor Device Metal Lowermost Electrode Etching
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Solution Overview
Problem
The challenge in manufacturing three-dimensional stacked memory devices is the increased complexity and variability in processing multiple electrode and insulating layers, leading to process variations and device characteristic variations, especially when forming holes in the stacked body.
Innovation Solution
The solution involves forming a stacked body with alternating electrode and insulating layers, where the lowermost electrode layer contains metal, and the remaining layers do not, allowing for efficient etching using a single gas that preferentially etches the non-metallic layers, thereby preventing over-etching and minimizing process defects and device variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of electrode layers and insulating layers forming the stacked body is increased, then memory capacity is improved, but processing difficulty and device characteristic variations worsen
Solution Approach 1:
The patent applies parameter changes by modifying the material composition of the lowermost electrode layer to contain metal, while other electrode layers use different materials. This material parameter differentiation enables selective etching behavior, allowing precise control of hole formation depth and shape even in stacked bodies with many layers, thereby maintaining manufacturing precision while increasing memory capacity
Solution Approach 2:
The patent introduces an intermediary mechanism through the metal-containing lowermost electrode layer that acts as an etching stop layer. This intermediary layer mediates the etching process by providing a distinct material interface that allows the etching gas to selectively remove insulating layers and non-metallic electrode layers while stopping at the metal layer, enabling precise hole formation without over-etching
2Quantity of substance
If the number of electrode layers and insulating layers is increased, then memory capacity is improved, but process variation increases
Solution Approach 1:
The patent reduces process variation by changing the material parameter of the lowermost electrode layer to contain metal, creating a consistent and reliable etching stop mechanism. This material differentiation provides a predictable etching endpoint that reduces variability in hole depth and shape across different devices, thereby improving process consistency while maintaining high memory capacity
Solution Approach 2:
The metal-containing lowermost electrode layer serves as a reliable intermediary that provides a consistent etching stop function. This intermediary mechanism ensures uniform hole formation across multiple devices by providing a predictable material interface that stops the etching process at the same depth, reducing process variation and improving reliability
3Productivity
If a single gas is used for etching the stacked body, then productivity is improved, but control precision over etching depth deteriorates
Solution Approach 1:
The patent achieves both high productivity and precise depth control using a single etching gas by changing the material parameter of the lowermost electrode layer to metal. The single gas etches through all insulating and non-metallic layers efficiently, while the metal layer provides a natural etching stop that precisely controls the etching depth, eliminating the need for multiple gases or complex process control
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables cost-effective and precise formation of memory holes with reduced process variations and device characteristic variations, ensuring consistent memory cell formation even with high aspect ratios, thereby enhancing the reliability and efficiency of the semiconductor device manufacturing process.
Implementation Method 1
etching using a single gas that preferentially etches the non-metallic layers
Data Source
AI summary
A semiconductor device according to one embodiment includes a semiconductor substrate, a back-gate layer formed above the semiconductor substrate, and a stacked body formed above the back-gate layer and comprising a plurality of insulating layers alternately formed between a plurality of electrode layers. The lowermost electrode layer of the plurality of electrode layers contains metal, and remaining electrode layers of the plurality of electrode layers other than the lowermost electrode layer do not contain the metal. Furthermore, the semiconductor device includes a pair of columnar semiconductor layers penetrating the stacked body and a semiconductor layer connecting lower portions of the pair of columnar semiconductor layers, the semiconductor layer embedded in the surface of the back-gate layer.