Semiconductor Process Integrating Metal Gate Capacitor

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Solution Overview

Problem

The integration of capacitors and transistors in semiconductor components poses challenges in achieving desired capacitance and operational power while simplifying processes and reducing processing costs as semiconductor components shrink and integration increases.

Innovation Solution

A semiconductor structure and process that forms electrodes of capacitors together with gates and contact plugs of transistors, using a metal gate with a U-shaped cross-sectional profile and low resistivity material, integrated with a second dielectric layer and contact plug to simplify processing steps and reduce costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If separate processes are used for forming capacitors and transistors, then each component can be optimized independently, but the processing steps increase and manufacturing costs rise

Engineering Contradiction:
Improvecomponent optimizationVSAvoidprocessing steps
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the capacitor formation process with the transistor formation process by using a common metal gate structure. The metal gate is formed first, then dielectric layers are deposited over both the metal gate and surrounding areas. Subsequent patterning steps create both the transistor gate and capacitor electrodes from the same metal gate structure, eliminating the need for separate capacitor fabrication processes while maintaining independent optimization of each component's electrical characteristics.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The metal gate structure serves multiple functions: it acts as the gate electrode for the MOS transistor and simultaneously serves as one electrode (either upper or lower) for the capacitor. This multi-functional design allows a single structure to fulfill multiple circuit functions, reducing the total number of fabrication steps and materials required while enabling independent optimization of transistor and capacitor parameters through selective dielectric layer deposition and patterning.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Ease of manufacture

If capacitor and transistor processes are integrated, then processing steps are simplified and costs reduced, but achieving desired capacitance and operational power becomes more challenging

Engineering Contradiction:
Improveprocessing stepsVSAvoidcapacitance control
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent applies local quality by depositing different dielectric materials in different regions over the common metal gate structure. For transistor regions, a gate dielectric is deposited to achieve desired threshold voltage and drive current characteristics. For capacitor regions, different dielectric materials with specific dielectric constants are deposited to achieve the required capacitance values. This localized material selection allows precise control of electrical parameters for each component type while using the same base metal gate structure.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent controls capacitance and operational power by varying dielectric layer parameters such as thickness, material composition, and dielectric constant in different regions. By adjusting the dielectric layer thickness over the metal gate in capacitor regions versus transistor regions, and by selecting dielectric materials with appropriate dielectric constants, the process achieves precise control of capacitance values and transistor operating characteristics simultaneously from a single integrated process flow.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9449964B2Semiconductor process
Publication Date: 2016.09.20 UNITED MICROELECTRONICS CORP
  • US9449964B2 patent drawing
  • US9449964B2 patent drawing
  • US9449964B2 patent drawing

AI summary

A semiconductor structure includes a metal gate, a second dielectric layer and a contact plug. The metal gate is located on a substrate and in a first dielectric layer, wherein the metal gate includes a work function metal layer having a U-shaped cross-sectional profile and a low resistivity material located on the work function metal layer. The second dielectric layer is located on the metal gate and the first dielectric layer. The contact plug is located on the second dielectric layer and in a third dielectric layer, thereby a capacitor is formed. Moreover, the present invention also provides a semiconductor process forming said semiconductor structure.