Semiconductor Metal Layer Edge Placement for Breakdown Voltage

Solution Overview

Problem

Ultra-high voltage semiconductor devices face challenges in achieving high breakdown voltage and reliability as their dimensions scale down, particularly in maintaining performance across various temperature environments.

Innovation Solution

The semiconductor device design includes a substrate with a drift region, an insulation layer, a gate layer, and a metal layer where the metal portion overlaps the insulation layer, with specific edge placements and ratios (a/L ≥ 0.46 and b/L ≤ 0.3) to enhance breakdown voltage and reliability, particularly in high temperature environments.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If the dimensions of ultra-high voltage semiconductor devices are scaled down, then device integration and compactness are improved, but achieving high breakdown voltage and reliability becomes more difficult

Engineering Contradiction:

Improvedevice dimensionsVSAvoidbreakdown voltage and reliability

Core Design Contradiction:

Volume of moving objectVSReliability

Solution Approach 1:

The patent applies local quality by creating asymmetric metal layer configurations with different coverage ratios on opposite sides of the insulation layer (a/L ≥ 0.46 and b/L ≤ 0.3). This asymmetric local structure optimizes the electric field distribution specifically in high-stress regions, enabling high breakdown voltage despite overall device scaling. The differential metal coverage creates localized field control that compensates for the reduced overall device dimensions.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The patent employs parameter changes by precisely controlling the metal layer coverage ratios (a/L and b/L) as key geometric parameters. By optimizing these dimensionless ratios, the invention achieves superior breakdown characteristics that are independent of absolute device size, thereby maintaining high reliability even as overall device dimensions are reduced for scaling.

Inventive Principle:

Principle #35Parameter changes

2Reliability

If the metal layer coverage ratio a/L is increased to improve breakdown voltage, then the breakdown voltage is improved, but the device area is increased

Engineering Contradiction:

Improvebreakdown voltageVSAvoiddevice area

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The patent concentrates the metal layer coverage optimization in specific local regions rather than uniformly across the entire device. By applying asymmetric coverage ratios (a/L ≥ 0.46 on one side, b/L ≤ 0.3 on the other), the invention achieves high breakdown voltage through localized field control, minimizing the overall area required while maintaining superior electrical characteristics.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The patent utilizes asymmetry by deliberately creating different metal coverage ratios on opposite sides of the insulation layer. This asymmetric configuration optimizes the electric field distribution to achieve high breakdown voltage without requiring symmetric expansion of the device area, thereby achieving compact high-voltage device design.

Inventive Principle:

Principle #4Asymmetry

3Reliability

If the metal layer is positioned closer to the central portion of the insulation layer, then the breakdown voltage is improved, but the gate control over the channel is reduced

Engineering Contradiction:

Improvebreakdown voltageVSAvoidgate control

Core Design Contradiction:

ReliabilityVSEase of operation

Solution Approach 1:

The patent applies local quality by creating asymmetric metal layer configurations with different coverage ratios on opposite sides of the insulation layer (a/L ≥ 0.46 and b/L ≤ 0.3). This asymmetric local structure optimizes the electric field distribution specifically in high-stress regions, enabling high breakdown voltage despite overall device scaling. The differential metal coverage creates localized field control that compensates for the reduced overall device dimensions.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The patent employs parameter changes by precisely controlling the metal layer coverage ratios (a/L and b/L) as key geometric parameters. By optimizing these dimensionless ratios, the invention achieves superior breakdown characteristics that are independent of absolute device size, thereby maintaining high reliability even as overall device dimensions are reduced for scaling.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS9082841B1Semiconductor device having metal layer over drift region

Publication Date: 2015.07.14 MACRONIX INTERNATIONAL CO LTD

AI summary

A semiconductor device includes a substrate, an insulation layer disposed over the substrate, covering a drift region, and including a first edge and a second edge opposite to the first edge, a gate layer covering the first edge of the insulation layer, and a metal layer including a metal portion connected to the gate layer and overlapping the first edge of the insulation layer. The metal portion includes a first edge located closer to a central portion of the insulation layer than an opposite second edge of the metal portion. A distance from the first edge of the metal portion to the first edge of the insulation layer along a channel length direction is a. A distance from the first edge of the insulation layer to the second edge of the insulation layer is L. A ratio of a/L is equal to or higher than 0.46.