Semiconductor Metal Line Layout for 3D Power Distribution
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Solution Overview
Problem
The demand for semiconductor devices with high reliability, high speed, and reduced manufacturing cost has increased, but existing semiconductor structures have limitations in meeting these demands, particularly in terms of integration and power voltage supply configurations.
Innovation Solution
A semiconductor device design featuring first and second active patterns spaced apart, with a gate electrode covering both, and multiple metal lines and power wirings arranged in specific directions to enhance integration and power supply efficiency, including a lower metal line and upper metal lines that intersect, allowing for efficient power distribution and increased integration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If existing semiconductor structures are used, then manufacturing processes are relatively simple, but integration and power voltage supply configurations cannot meet high reliability and high speed demands
Solution Approach 1:
The power supply configuration is segmented into multiple independent power wirings (first power wiring, second power wiring, third power wiring) that can be independently controlled. This segmentation allows different voltage levels to be supplied to different regions, enabling high reliability through localized power management while maintaining manageable complexity through modular design
Solution Approach 2:
The patent introduces a vertical dimension to power supply configuration by stacking power wirings at different heights (first power wiring at lowest level, second power wiring at intermediate level, third power wiring at highest level). This three-dimensional power distribution architecture increases integration density and power supply efficiency without proportionally increasing lateral complexity
2Productivity
If more metal lines and power wirings are added to enhance integration, then power supply efficiency improves, but manufacturing complexity increases
Solution Approach 1:
The metal lines are designed to serve multiple functions: they act as both signal transmission lines connecting active patterns to source/drain regions and as power distribution pathways. The first metal line connects first active patterns while also distributing power, and the second metal line connects second active patterns while serving power distribution. This multi-functionality increases integration efficiency without proportionally increasing manufacturing complexity
Solution Approach 2:
The patent merges the signal transmission function and power distribution function into the same metal line structures. By combining these functions, the number of separate wiring layers is reduced, which enhances integration efficiency while controlling manufacturing complexity through consolidated structure design
Data Source
AI summary
A semiconductor device includes: first and second active patterns spaced apart from each other in a third direction; a gate electrode covering the first and second active patterns and extending in a second direction; a first source/drain region disposed on opposing sides of the gate electrode and connected to the first active pattern; a second source/drain region disposed on opposing sides of the gate electrode and connected to the second active pattern; a plurality of first upper metal lines extending in a first direction on the second active pattern and spaced apart from each other in the second direction; and a lower metal line extending in the first direction on the first active pattern, wherein the first direction, the second direction and the third direction intersect each other.