Semiconductor Device Metal Oxide Layer Insulating Region
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Solution Overview
Problem
Current semiconductor devices using oxide semiconductors face challenges in achieving stable and reliable electrical characteristics, particularly in high-performance display devices, due to limitations in field-effect mobility and reliability.
Innovation Solution
A semiconductor device structure is developed, incorporating a semiconductor layer with a metal oxide layer and insulating regions, where the metal oxide layer is positioned between the insulating and conductive layers, and the insulating region has a different relative dielectric constant, enhancing the electrical characteristics and reliability by improving the source-drain withstand voltage and channel formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a metal oxide layer is used as a semiconductor layer, then field-effect mobility is improved, but reliability and electrical stability deteriorate
Solution Approach 1:
The patent employs a composite structure consisting of a metal oxide layer (such as IGZO - indium gallium zinc oxide) combined with insulating layers having different dielectric constants. This composite configuration allows the device to achieve both high field-effect mobility from the metal oxide semiconductor and improved reliability through the insulating layers that stabilize electrical characteristics and prevent degradation.
Solution Approach 2:
The patent introduces insulating regions with different dielectric constants at specific locations (such as near the source and drain regions) to locally address electrical stability issues. These insulating layers are strategically positioned to control electric field distribution and prevent voltage breakdown without compromising the overall high mobility characteristics of the metal oxide channel.
2Power
If high voltage is applied to achieve high performance, then electrical characteristics improve, but device reliability deteriorates
Solution Approach 1:
The patent incorporates insulating layers with appropriate dielectric constants before applying high voltages during device operation. These layers act as protective barriers that prevent voltage breakdown and electrical breakdown at the interface between metal oxide and other layers, thereby enabling high-power operation while maintaining reliability and extending device lifetime.
3Ease of manufacture
If insulating layers with same dielectric constant are used, then manufacturing is simplified, but electrical characteristics deteriorate
Solution Approach 1:
The patent employs insulating layers with different dielectric constants at different locations within the device structure. For example, a first insulating layer with a higher dielectric constant is used near the channel region to enhance gate control, while a second insulating layer with a lower dielectric constant is used in other regions to reduce parasitic capacitance. This localized differentiation improves electrical characteristics while maintaining reasonable manufacturing complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed structure provides a semiconductor device with improved electrical characteristics and high reliability, enabling stable operation even under high voltages, thus addressing the limitations of existing oxide semiconductor devices.
Implementation Method 1
The metal oxide layer 114 functions as a barrier film that prevents diffusion of oxygen contained in the insulating layer 110 into a conductive layer 112 side
Implementation Method 2
By the heat treatment, oxygen can be supplied from the insulating layer 110 to the metal oxide layer 114
Data Source
AI summary
A semiconductor device with favorable electrical characteristics is provided. A highly reliable semiconductor device is provided. A semiconductor device with stable electrical characteristics is provided. The semiconductor device includes a semiconductor layer, a first insulating layer, a metal oxide layer, a conductive layer, and an insulating region. The first insulating layer covers a top surface and a side surface of the semiconductor layer, and the conductive layer is positioned over the first insulating layer. The metal oxide layer is positioned between the first insulating layer and the conductive layer, and an end portion of the metal oxide layer is positioned on an inner side than an end portion of the conductive layer. The insulating region is positioned adjacent to the metal oxide layer and positioned between the first insulating layer and the conductive layer. Furthermore, the semiconductor layer includes a first region, a pair of second regions, and a pair of third regions. The first region overlaps with the metal oxide layer and the conductive layer. The second regions are positioned to put the first region sandwiched therebetween and to overlap with the insulating region and the conductive layer. The third regions are positioned to the first region and the pair of second regions sandwiched therebetween and not to overlap with the conductive layer. The third regions preferably include a portion having lower resistance than the first region. The second regions preferably include a portion having higher resistance than the third regions.