Semiconductor Device With Metal Oxide Channel And Overlapping Circuits
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Solution Overview
Problem
Current semiconductor devices face challenges in achieving a small circuit area, low power consumption, and high-speed operation, particularly in DRAM technology, where miniaturization and power efficiency are critical but not fully addressed.
Innovation Solution
A semiconductor device design incorporating multiple cell arrays and peripheral circuits with metal oxide in the channel formation region, including driver and amplifier circuits, optimized for reduced circuit area and power consumption through specific wiring configurations and overlapping circuit layouts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If conventional transistors are used in DRAM, then the circuit area can be reduced through miniaturization, but power consumption increases and operation speed decreases
Solution Approach 1:
The patent changes the material parameter of the transistor channel from conventional silicon-based semiconductors to oxide semiconductors. This material parameter change fundamentally alters the electrical characteristics, enabling extremely low off-state current (10^-21 to 10^-24 A) while maintaining high on-state current, thus resolving the contradiction between circuit miniaturization and power consumption reduction.
Solution Approach 2:
The patent employs oxide semiconductor materials (such as In-Ga-Zn-O) that combine properties of both insulators and conductors. This composite material approach allows the transistor to achieve ultra-low leakage current when off while maintaining high conductivity when on, enabling both small circuit area and low power consumption simultaneously.
2Area of stationary object
If conventional transistors are miniaturized, then circuit area decreases, but operation speed and reliability deteriorate
Solution Approach 1:
By changing the semiconductor material to oxide semiconductors, the patent achieves high mobility carriers even in miniaturized structures. The oxide semiconductor channel maintains high on-state current density despite reduced dimensions, enabling fast operation speeds in compact DRAM cells.
3Area of stationary object
If conventional transistors are miniaturized, then circuit area decreases, but leakage current increases causing reliability issues
Solution Approach 1:
The patent fundamentally changes the material parameter to oxide semiconductors, which possess an extremely wide bandgap (3.5-4.5 eV). This parameter change results in ultra-low off-state current (10^-21 to 10^-24 A) that is insensitive to device miniaturization, thereby maintaining high reliability even as circuit area is reduced.
Solution Approach 2:
The use of oxide semiconductor materials provides inherent immunity to leakage current issues that plague conventional miniaturized transistors. The unique material properties enable reliable operation with negligible leakage even in deeply scaled devices.
4Adaptability or versatility
If more peripheral circuits are added to increase functionality, then device complexity increases, but circuit area and power consumption increase
Solution Approach 1:
The patent merges the peripheral circuits (driver circuits and amplifier circuits) with the cell array in a unified integrated structure. The peripheral circuits are positioned to overlap with the cell array region, allowing shared physical space and reducing the total circuit area while maintaining full functionality.
Solution Approach 2:
The patent utilizes three-dimensional integration by allowing peripheral circuits to overlap vertically with the cell array. This dimensional approach enables multiple functional blocks to coexist in the same planar footprint, increasing device functionality without proportionally increasing circuit area.
Data Source
AI summary
To provide a novel semiconductor device.The semiconductor device includes cell arrays and peripheral circuits; the cell arrays include memory cells; the peripheral circuits includes a first driver circuit, a second driver circuit, a first amplifier circuit, a second amplifier circuit, a third amplifier circuit, and a fourth amplifier circuit; the first driver circuit and the second driver circuit have a function of supplying a selection signal to the cell array; the first amplifier circuit and the second amplifier circuit have a function of amplifying a potential input from the cell array; the third amplifier circuit and the fourth amplifier circuit have a function of amplifying a potential input from the first amplifier circuit or the second amplifier circuit; the first driver circuit, the second driver circuit, the first amplifier circuit, the second amplifier circuit, the third amplifier circuit, and the fourth amplifier circuit include a region overlapping with the cell array; and the memory cells include a metal oxide in a channel formation region.