Semiconductor Metal Pad Gate Electrode Etching Process

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The existing manufacturing processes for semiconductor devices with metal contacts require multiple etching steps to achieve metal contacts of varying dimensions, which is inefficient and complex.

Innovation Solution

A method and structure where the gate electrode and metal pad are formed simultaneously on a semiconductor device, with the height of the metal pad being the same as the gate electrode, allowing for simplified etching and integration of metal contacts with consistent dimensions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If multiple etching processes are used to form metal contacts of different dimensions, then the manufacturing precision of metal contacts is improved, but the device complexity and manufacturing time increase

Engineering Contradiction:
Improvemetal contact dimension precisionVSAvoidetching process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent merges the formation of gate electrode and metal pad into a single etching process. By designing a unified etching mask that defines both structures simultaneously, the patent eliminates the need for separate etching processes, reducing manufacturing complexity while maintaining precise dimensional control through the mask design

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The etching mask serves multiple functions: it defines the gate electrode pattern, defines the metal pad pattern, and controls the etching depth for both structures. This multi-functional approach allows a single etching process to achieve what previously required multiple specialized processes

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Manufacturing precision

If multiple etching processes are used to form metal contacts of different dimensions, then the manufacturing precision of metal contacts is improved, but the productivity decreases

Engineering Contradiction:
Improvemetal contact dimension precisionVSAvoidmanufacturing efficiency
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent combines multiple etching operations into one unified process by using a single etching mask to define both gate electrode and metal pad structures. This merging eliminates the sequential time required for multiple etching processes, directly improving manufacturing productivity while maintaining precision through the mask's design

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If metal contacts of varying dimensions are formed, then the adaptability of the semiconductor device is improved, but the manufacturing precision control becomes more difficult

Engineering Contradiction:
Improvemetal contact dimension variationVSAvoiddimensional consistency
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The etching mask is designed with locally differentiated features: different pattern geometries, different opening sizes, or different material compositions in specific regions. These local variations in the mask enable the formation of metal contacts with different dimensions while maintaining precise control through the mask's engineered local properties

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11038053B2Semiconductor device and method of manufacturing the same
Publication Date: 2021.06.15 SAMSUNG ELECTRONICS CO LTD
  • US11038053B2 patent drawing
  • US11038053B2 patent drawing
  • US11038053B2 patent drawing

AI summary

A semiconductor device includes a substrate, and a first source/drain region formed on the substrate. The semiconductor device further includes a channel formed on the first source/drain region, and a second source/drain region formed on the channel. The semiconductor device also includes a gate electrode formed on an external surface of the channel, and a metal pad formed on the substrate. The height of an upper surface of the metal pad is the same as the length of an upper surface of the gate electrode.