Semiconductor Device Metal Pillar Interconnection
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Solution Overview
Problem
The challenge in miniaturizing semiconductor devices is the risk of damage during via hole formation and misalignment of bond pads with interconnection patterns on printed circuit boards, leading to electrical failures and increased size and weight of semiconductor packages.
Innovation Solution
The use of metal pillars disposed perpendicular to bond pads on semiconductor dies eliminates the need for via holes, allowing for direct electrical connection and simplifying the fabrication process, enabling the stacking of multiple semiconductor dies and reducing the overall thickness and size of semiconductor devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If via holes are formed to connect interconnection layers and bond pads, then electrical connection is achieved, but semiconductor dies are damaged due to impact during via hole formation
Solution Approach 1:
The patent extracts and eliminates the via hole formation process from the connection method. Instead of forming via holes through the semiconductor die, metal pillars are directly disposed perpendicular to the bond pads, removing the harmful impact process while maintaining electrical connection functionality.
Solution Approach 2:
The patent replaces the mechanical via hole formation process (which involves drilling or etching through the die) with a direct metal pillar attachment method. This substitution eliminates the mechanical impact that causes die damage while achieving the same electrical connection purpose.
2Reliability
If bond pads are precisely aligned with interconnection patterns, then electrical connection is achieved, but alignment complexity and fabrication difficulty increase
Solution Approach 1:
The metal pillars serve as self-aligning structures that automatically position themselves relative to the bond pads during attachment. This self-service mechanism eliminates the need for complex external alignment processes, reducing both alignment complexity and fabrication difficulty while ensuring reliable electrical connection.
3Volume of moving object
If semiconductor packages are miniaturized, then product size is reduced, but the relative proportion of printed circuit board increases leading to overall size reduction limitations
Solution Approach 1:
The patent merges the semiconductor die and interconnection structure into a more integrated configuration by using metal pillars that directly connect bond pads to interconnection layers without requiring separate via hole structures. This merging reduces the overall package volume and simplifies the device structure, allowing further miniaturization.
4Adaptability or versatility
If multiple semiconductor dies are stacked, then functionality is increased, but thickness and weight of the stack increase
Solution Approach 1:
The patent optimizes the vertical dimension by eliminating via hole structures and using direct metal pillar connections, which reduce the thickness required for each die layer. This dimensional optimization allows multiple dies to be stacked with reduced overall thickness, enabling increased functionality without proportionally increasing stack height.
Data Source
AI summary
A semiconductor device for use in a printed circuit board is provided. In the semiconductor device, metal pillars are disposed perpendicular to bond pads of a semiconductor die. This configuration eliminates the need to form via holes for the connection of interconnection layers and the bond pads of the semiconductor die, thus simplifying the fabrication procedure of the semiconductor device. In addition, the semiconductor die is embedded in the semiconductor device. Based on this configuration, the use of the semiconductor device in a printed circuit board facilitates the stacking of a plurality of semiconductor dies and can reduce the thickness required for the stack, which make the semiconductor device light in weight and small in thickness and size.