Semiconductor Metal Plug Contact With Oxygen Gradient Metal Oxide
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Solution Overview
Problem
Current semiconductor devices face challenges in reducing contact resistance and intrinsic resistivity between metal plugs and substrates due to pinned Fermi levels and high Schottky barrier heights, which are not effectively addressed by existing technologies.
Innovation Solution
The formation of a semiconductor device involves creating a metal oxide layer with an oxygen gradient and a silicide layer between the metal plug and the substrate, using specific metal layers and annealing processes to unpins the Fermi level and reduce contact resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a metal plug is formed directly on a substrate, then the manufacturing process is simple, but the contact resistance and intrinsic resistivity are high due to pinned Fermi levels and high Schottky barrier heights
Solution Approach 1:
The contact structure is segmented into multiple functional layers: a metal oxide layer with oxygen gradient and a silicide layer are inserted between the metal plug and substrate. This segmentation allows each layer to perform its specific function - the metal oxide layer unpins the Fermi level while the silicide layer provides low-resistance contact, collectively reducing contact resistance without requiring a single complex material
Solution Approach 2:
The patent employs composite material structures including a metal oxide layer containing oxygen vacancies and a silicide layer formed from reactive metals. These composite materials combine the benefits of different material properties - the metal oxide provides Fermi level unpinning while the silicide provides conductive pathways, achieving low contact resistance through material composition rather than simple geometric scaling
2Reliability
If the Schottky barrier height is reduced by material selection, then contact resistance decreases, but the manufacturing precision and control of oxygen vacancy states become more difficult
Solution Approach 1:
The patent controls the oxygen gradient parameter within the metal oxide layer to optimize performance. By adjusting oxygen partial pressure during deposition and controlling annealing conditions, the oxygen vacancy concentration is precisely tuned to achieve Fermi level unpinning while maintaining manufacturability. This parameter control approach balances electrical performance with manufacturing precision
Solution Approach 2:
The metal oxide layer is formed with a predetermined oxygen gradient before the silicide layer is deposited. This preliminary structuring of the metal oxide layer with controlled oxygen vacancies prepares the interface for optimal Fermi level unpinning, ensuring that subsequent processing steps build upon a pre-optimized foundation rather than requiring complex in-situ adjustments
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach lowers the Schottky barrier height, increases oxygen vacancy states, and decreases contact resistance, thereby improving the electrical performance of semiconductor devices by reducing strain on the silicon lattice and enhancing the semiconductor device's efficiency.
Implementation Method 1
increases oxygen vacancy states
Implementation Method 2
lowers the Schottky barrier height
Implementation Method 3
annealing processes
Implementation Method 4
decreases contact resistance
Data Source
AI summary
A semiconductor device and method of formation are provided. The semiconductor device comprises a metal plug in a first opening over a substrate, the metal plug is over a silicide layer, and the silicide layer is over a metal oxide layer. The metal oxide layer has an oxygen gradient, such that a percentage of oxygen increases from a top surface of the metal oxide layer to a bottom surface of the metal oxide layer. The metal oxide layer unpins the Fermi level of the interface between the metal plug and the substrate, which is exhibited by a lowered Schottky barrier height (SBH) and increased oxygen vacancy states between the V.B. and the C.B. of the metal oxide layer, which decreases the intrinsic resistivity between the metal plug and the substrate as compared to a semiconductor device that lacks such a metal oxide layer.