Segmented Inter-Metal Dielectric Layers for Semiconductor Wiring

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Solution Overview

Problem

The conventional process of forming metal wiring in semiconductor devices requires a large number of processes due to the significant thickness difference between inter-metal dielectric layers in low voltage and high voltage regions, leading to increased processing costs and reduced efficiency.

Innovation Solution

A metal wiring structure for semiconductor devices that includes a high-voltage isolator region with multiple inter-metal dielectric layers and etching stop layers, where contact plugs in adjacent layers crisscross or contact each other at right angles, allowing for electrical connection between metal layers without additional metal layers, and utilizing materials like tungsten or copper for the contact plugs and metal layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional metal wiring processes are used with thick inter-metal dielectric layers in low voltage regions and thin oxide films in high voltage regions, then proper insulation is achieved in both regions, but the number of processes increases and processing efficiency decreases

Engineering Contradiction:
Improveinsulation performanceVSAvoidprocessing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The inter-metal dielectric layer is segmented into multiple sub-layers (first inter-metal dielectric layer, second inter-metal dielectric layer, third inter-metal dielectric layer) with different thicknesses in different regions. The first layer has greater thickness in the low voltage region while the third layer has greater thickness in the high voltage region, allowing each segment to be optimized for its specific functional requirement without compromising overall processing efficiency.

Inventive Principle:
Principle #1Segmentation

2Reliability

If multiple metal layers and contact plugs are formed to achieve electrical connectivity, then proper electrical connections are established, but the number of manufacturing processes increases and costs increase

Engineering Contradiction:
Improveelectrical connectivityVSAvoidnumber of processes
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the functions of multiple separate metal layers and contact plugs into a single integrated metal wiring structure. The metal wiring directly penetrates through the segmented inter-metal dielectric layers to establish electrical connections, eliminating the need for separate VIA holes and contact plug formation processes, thereby reducing manufacturing complexity while maintaining electrical connectivity.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS9558992B2Metal wiring of semiconductor device and method for manufacturing the same
Publication Date: 2017.01.31 SK KEYFOUNDRY INC
  • US9558992B2 patent drawing
  • US9558992B2 patent drawing
  • US9558992B2 patent drawing

AI summary

A metal wiring for applying a voltage to a semiconductor component of a semiconductor device, the semiconductor device comprising a low voltage applying region adjacent to a high voltage applying region, is provide. The metal wiring includes: an isolator region, a first lower metal layer electrically connected to the semiconductor component, a first upper metal layer configured to be electrically connected to an external power supply, and a plurality of inter-metal dielectric layers deposited between the first lower metal layer and the first upper metal layer, each of the plurality of inter-metal dielectric layers comprising at least one contact plug for providing an electrical connection between the first lower metal layer and the first upper metal layer.