Semiconductor Metallization Barrier Layer Removal via Diffusion
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Solution Overview
Problem
Conventional semiconductor component processing methods face challenges in selecting suitable materials and material combinations for achieving desired electrical properties, fail-safety, cost-effectiveness, and high process yield, particularly in edge termination and passivation layers, where etching methods can result in rough surfaces and etching damage.
Innovation Solution
A method involving the formation of a metallization layer and a barrier layer, where the barrier layer, typically amorphous silicon, is driven into the metallization layer through an annealing process, eliminating the need for etching and enabling self-aligning layer removal without patterning, thereby ensuring smooth surfaces and maintaining electrical conductivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If etching methods are used to remove layers during semiconductor component processing, then layer removal can be achieved, but the remaining surface becomes rough and suffers from etching damage
Solution Approach 1:
The patent extracts and removes the harmful etching process from the manufacturing sequence. Instead of using etching to remove the barrier layer, the invention drives the barrier layer into the metallization layer through diffusion, completely eliminating etching-related surface damage and roughness while achieving precise layer removal.
Solution Approach 2:
The patent replaces the mechanical/chemical etching process with a thermal diffusion process. By heating the structure to enable atomic diffusion of the barrier layer into the metallization layer, the invention substitutes a gentle thermal process for the aggressive etching process, preserving surface integrity.
2Manufacturing precision
If patterned masks are used for selective layer removal, then precise patterning can be achieved, but the process complexity increases due to additional photolithography steps
Solution Approach 1:
The barrier layer serves dual functions: it protects the metallization layer during processing and simultaneously provides the patterning definition. By driving the barrier layer into the metallization layer selectively, the process achieves self-aligned patterning without requiring external masks, making the system self-sufficient and eliminating complex photolithography steps.
Solution Approach 2:
The patent merges the protective function and the patterning function into a single barrier layer. This unified approach eliminates the need for separate mask layers and combines layer protection with precise pattern definition, simplifying the overall process sequence while maintaining high patterning accuracy.
3Reliability
If conventional layering and patterning processes are used, then semiconductor structures can be formed, but material selection becomes difficult to satisfy electrical properties, fail-safety, cost, and yield requirements
Solution Approach 1:
The patent changes the fundamental processing parameter from etching to thermal diffusion. This parameter change enables the use of specific material combinations (such as silicon nitride barrier layer with aluminum metallization) that would be incompatible with etching processes, thereby expanding material selection freedom while improving reliability and electrical properties.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for precise control over layer thickness and material integration, reducing surface roughness, enhancing electrical properties, and improving the reliability and yield of semiconductor components by avoiding etching-related damages and allowing for accurate patterning of passivation layers.
Implementation Method 1
removing the barrier layer in the at least one first region of the substrate by drive-in of the barrier layer into the metallization layer
Implementation Method 2
the barrier layer, typically amorphous silicon, is driven into the metallization layer through an annealing process
Data Source
AI summary
In various embodiments, a method is provided. The method includes forming a metallization layer above at least one first region of a substrate. After forming the metallization layer at least one second region of the substrate is free of the metallization layer. The method further includes forming a barrier layer above the at least one first region of the substrate and above the at least one second region of the substrate. The barrier layer in the at least one first region of the substrate directly adjoins the metallization layer. The method further includes removing the barrier layer in the at least one first region of the substrate by drive-in of the barrier layer into the metallization layer.


