Semiconductor Package Integrating Microcomputer and Power MOSFET

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Solution Overview

Problem

Conventional semiconductor devices with integrated microcomputers and power MOSFETs are limited in size reduction due to separate packaging, which hinders miniaturization and increases complexity in motor control systems for applications like automobiles.

Innovation Solution

A semiconductor device design that integrates a microcomputer and a power MOSFET onto a single package using a wiring board with multiple leads, where the microcomputer and power MOSFET are electrically coupled, and sealed with a resin to enhance heat dissipation and reduce size, allowing for compact motor control systems.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If microcomputer and power MOSFET are separately packaged, then each component can be optimized independently, but the overall device size increases and integration is reduced

Engineering Contradiction:
Improvedevice sizeVSAvoidpackaging structure
Core Design Contradiction:
Volume of moving objectVSDevice complexity

Solution Approach 1:

The patent combines the microcomputer chip and power MOSFET chip into a single package structure, where both chips are mounted on a common substrate and electrically connected through lead frames. This merging approach reduces the overall device volume while maintaining independent optimization of each component through separate chip designs.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The package is segmented into distinct functional areas: the microcomputer chip mounting region, the power MOSFET chip mounting region, and the lead frame structure that provides electrical interconnection. This segmentation allows independent optimization of each component while achieving integration within a compact package.

Inventive Principle:
Principle #1Segmentation

2Volume of moving object

If multiple components are integrated into one package, then size is reduced, but heat dissipation becomes more challenging

Engineering Contradiction:
Improvedevice sizeVSAvoidheat dissipation
Core Design Contradiction:
Volume of moving objectVSTemperature

Solution Approach 1:

The patent implements local quality by providing dedicated heat dissipation paths for each chip type. The power MOSFET chip has direct thermal coupling with the substrate through its mounting structure, while the microcomputer chip has its own thermal management path. This localized approach allows efficient heat dissipation despite high integration density.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The substrate and lead frame structure serve as thermal intermediaries, conducting heat away from both chips to external heat sinks. The lead frames act as thermal pathways that transfer heat from the chip mounting areas to the package exterior, enabling effective heat management in the integrated structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Power

If components are closely integrated, then wiring length is reduced and performance improves, but manufacturing precision requirements increase

Engineering Contradiction:
Improveelectrical performanceVSAvoidassembly precision
Core Design Contradiction:
PowerVSManufacturing precision

Solution Approach 1:

The lead frame structure serves multiple functions simultaneously: it provides electrical interconnection between chips and external terminals, mechanical support for chip mounting, and thermal conduction pathways. This multi-functionality reduces the need for separate components and simplifies the assembly process while maintaining short electrical paths for high performance.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The lead frames are pre-formed with specific geometric patterns and electrical connection points before chip mounting. This preliminary preparation of the interconnection structure allows for precise electrical pathways to be established, reducing assembly complexity and ensuring consistent electrical performance across manufactured units.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8779575B2Semiconductor device package having a semiconductor chip on wiring board connected to plurality of leads including power MOSFETs
Publication Date: 2014.07.15 RENESAS ELECTRONICS CORP
  • US8779575B2 patent drawing
  • US8779575B2 patent drawing
  • US8779575B2 patent drawing

AI summary

A technology enabling reduction of the size of a semiconductor device including a micro and a power MOSFET is provided. The semiconductor device is obtained by single packaging a first semiconductor chip with a micro formed therein and second semiconductor chips with a power MOSFET formed therein. This makes it possible to reduce the size of the semiconductor device as compared with cases where a first semiconductor chip with a micro formed therein and second semiconductor chips with a power MOSFET formed therein are separately packaged.