Semiconductor Patterning with Mixed Feature Sizes via Spacer Masks
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Solution Overview
Problem
The existing Self-Aligned Double Patterning (SADP) technique requires complex fabrication processes to form both small-pitch and large-pitch patterns on semiconductor substrates, necessitating separate processes for each, which complicates the manufacturing of semiconductor devices with varying feature sizes.
Innovation Solution
A method involving etching a first film layer to form features of different critical dimensions, followed by the formation of spacers and controlled etching processes to create smaller and larger features on the same substrate, using a protective film to differentiate etching regions, allowing for the simultaneous fabrication of memory cells with varying cell line widths and pitches without additional photo/mask processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If separate fabrication processes are used for small-pitch and large-pitch patterns, then both pattern types can be formed, but the fabrication process becomes complicated
Solution Approach 1:
The patent merges the formation of small-pitch and large-pitch patterns into a single integrated fabrication process. By using a unified approach where spacers are formed on both small-pitch and large-pitch features simultaneously, and a single etch process patterns both regions, the method eliminates the need for separate fabrication sequences while maintaining the ability to produce different pitch patterns on the same substrate.
Solution Approach 2:
The fabrication method achieves multi-functionality by using the same process steps to create both small-pitch and large-pitch patterns. The spacer formation and etching processes serve dual purposes: defining small-pitch features in one region and large-pitch features in another region, thereby reducing overall process complexity while maintaining versatility.
2Adaptability or versatility
If additional photo/mask processes are used to form different feature sizes, then various feature sizes can be achieved, but manufacturing costs increase
Solution Approach 1:
The patent combines multiple patterning operations into a single etch process by using spacers as self-aligned masks. This eliminates the need for additional photo/mask processes that would otherwise be required to create different feature sizes, thereby reducing manufacturing costs while maintaining the capability to produce various feature dimensions.
Solution Approach 2:
The spacer structures serve as self-aligned masks that automatically define the pattern boundaries without requiring external photo/mask intervention. The spacers are formed conformally on the features and subsequently used as masks during etching, enabling the process to self-define the feature sizes and reducing dependence on additional lithography steps.
3Productivity
If a single etch process is used for both small-pitch and large-pitch regions, then processing time is reduced, but selective etching becomes difficult to control
Solution Approach 1:
The patent applies local quality by creating different local conditions in small-pitch and large-pitch regions through the spacer structure. The spacers are formed with specific dimensions and materials that create distinct etching environments: in small-pitch regions, the spacers are closely spaced creating a specific etch loading effect, while in large-pitch regions, the spacers are more widely spaced, allowing the single etch process to selectively remove material based on local geometric conditions.
Solution Approach 2:
The method utilizes parameter changes in the etch process by exploiting the relationship between feature geometry and etch rate. The different spacer configurations in small-pitch versus large-pitch regions create different etch loading effects, allowing a single etch process to achieve selective removal of material based on local geometric parameters rather than requiring different etch recipes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the fabrication of memory chips with both high-density and high-reliability storage capabilities by forming memory cells with different pitches on the same chip, simplifying the manufacturing process and reducing costs, while maintaining high reliability and density storage demands.
Implementation Method 1
etching a first film layer disposed below a patterned mask to form a first feature and a second feature on a second film layer
Implementation Method 2
conformally depositing a spacer layer over the first feature and the second feature and on the second film layer
Implementation Method 3
controlling an etching process such that the first portion of the second film layer is etched through and the second portion of the second film layer is protected from etching by a protective film formed during the etching process; etching the second portion of the second film layer to obtain material of the second film layer with an amount enough to react with an etching gas of the etching process to form the protective film
Data Source
AI summary
Methods of fabricating semiconductor devices having patterns with different feature sizes are provided. An example method includes: etching a first film layer below a patterned mask to form first and second features on a second film layer, forming respective first and second spacers adjacent to sidewalls of the first and second features on the second film layer, removing the first and second features to expose respective first and second portion of the second film layer, the second portion having a larger CD than the first portion, controlling an etching process such that the first portion is etched through and the second portion is protected from etching by a protective film formed during the etching process, and patterning a thin film masked by the first spacer, the second spacer, and the second portion to form smaller features and larger features in respective first and second regions of the thin film.