Semiconductor Device With Mixed Threshold Voltage Transistors

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Solution Overview

Problem

Semiconductor devices face a challenge in balancing power consumption and operating speed, as reducing power consumption often increases leakage current and decreases operating speed, making it difficult to achieve both simultaneously.

Innovation Solution

The use of transistors with different threshold voltages in specific regions of the semiconductor device, where transistors with lower threshold voltages are used on data paths to increase speed and transistors with higher threshold voltages are used on feedback paths to minimize leakage current, while power supply lines are strategically placed to optimize performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If transistors with lower threshold voltages are used to increase operating speed, then operating speed is improved, but power consumption increases due to increased leakage current

Engineering Contradiction:
Improveoperating speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent applies local quality by using transistors with different threshold voltages in different regions of the semiconductor device. Specifically, transistors with lower threshold voltages are used in the first region to achieve higher operating speed, while transistors with higher threshold voltages are used in the second region to minimize leakage current and reduce power consumption. This spatial differentiation of transistor characteristics resolves the contradiction between speed and power consumption by optimizing each region for its specific functional requirements.

Inventive Principle:
Principle #3Local quality

2Use of energy by moving object

If transistors with higher threshold voltages are used to reduce leakage current, then power consumption is reduced, but operating speed decreases

Engineering Contradiction:
Improvepower consumptionVSAvoidoperating speed
Core Design Contradiction:
Use of energy by moving objectVSSpeed

Solution Approach 1:

The patent resolves this contradiction by implementing local quality through regional differentiation of transistor threshold voltages. The second region employs transistors with higher threshold voltages to minimize leakage current and reduce power consumption, while the first region uses transistors with lower threshold voltages to maintain high operating speed. This approach allows the device to achieve overall power efficiency without sacrificing the speed performance of critical paths.

Inventive Principle:
Principle #3Local quality

3Use of energy by moving object

If transistors with different threshold voltages are used in different regions, then both power consumption and operating speed can be optimized, but device complexity increases

Engineering Contradiction:
Improvepower consumptionVSAvoiddevice complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent manages device complexity by implementing local quality in a systematic manner. Different transistor types are assigned to different regions based on functional requirements, with the first region using low-threshold-voltage transistors for speed-critical operations and the second region using high-threshold-voltage transistors for leakage-sensitive operations. This structured approach to local quality optimization achieves both power consumption and speed optimization while maintaining manageable device complexity through clear regional differentiation.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11424251B2Semiconductor device
Publication Date: 2022.08.23 SAMSUNG ELECTRONICS CO LTD
  • US11424251B2 patent drawing
  • US11424251B2 patent drawing
  • US11424251B2 patent drawing

AI summary

A semiconductor device is provided. The semiconductor device includes power supply lines extending in a first direction; first transistors, each of which is formed in a first region and has a first threshold voltage; and second transistors, each of which is formed in a second region and has a second threshold voltage higher than the first threshold voltage. One of the plurality of power supply lines is interposed between the first region and the second region, the first transistors implement a first portion of a multiplexer, a clock buffer and a first latch that are disposed on a data path, the second transistors implement a second portion of the multiplexer circuit and a second latch that are disposed on a feedback path, and the first portion of the multiplexer circuit and the second portion of the multiplexer circuit are disposed in a common location along the first direction.