Semiconductor Module Manufacturing via Substrate Burn-In Sorting
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Solution Overview
Problem
The manufacturing of semiconductor modules is time-consuming and costly due to multiple processes involved, including fabrication, electrical die sorting, and assembly, which increases facility and material investments.
Innovation Solution
A method that involves forming semiconductor chips on a bare substrate, performing a burn-in process to identify and sort operational chips, separating them by cutting the substrate, and directly mounting the chips on a module substrate with conductive bumps and a protective pattern, thereby reducing the need for subsequent testing and assembly processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If semiconductor modules are manufactured through multiple processes (FAB, EDS, cutting, testing, mounting), then the electrical characteristics can be tested and sorted, but the manufacturing time increases and production costs increase due to higher facility and material investments
Solution Approach 1:
The patent combines the EDS process with the FAB process by performing electrical die sorting on the substrate while the semiconductor chips are still attached, rather than as a separate post-assembly step. This merging eliminates the need for separate testing facilities and reduces manufacturing time while maintaining reliability testing capabilities
Solution Approach 2:
The patent performs electrical die sorting and burn-in testing on the substrate before the chips are cut and mounted. This preliminary action allows defective chips to be identified and removed early in the process, preventing wasted assembly time and reducing the need for post-assembly testing and rework
2Reliability
If semiconductor modules are manufactured through multiple processes (FAB, EDS, cutting, testing, mounting), then the electrical characteristics can be tested and sorted, but production costs increase due to higher facility and material investments
Solution Approach 1:
The patent combines multiple processes (FAB, EDS, cutting, mounting) into an integrated manufacturing flow where electrical die sorting is performed on the substrate in-line with chip fabrication. This eliminates the need for separate testing facilities and reduces facility investment costs while maintaining comprehensive electrical characteristic testing
Solution Approach 2:
The substrate serves multiple functions throughout the manufacturing process: it acts as both the fabrication platform and the testing platform. By performing EDS on the substrate itself rather than requiring separate chip-level testing equipment, the system achieves multi-functionality that reduces overall production costs
3Loss of time
If burn-in process is performed on bare substrate including semiconductor chips before sorting, then operational chips can be identified early, but the process complexity increases
Solution Approach 1:
The burn-in process is performed on the bare substrate with all chips attached before any cutting or mounting operations. This preliminary action identifies defective chips early, allowing them to be removed before assembly. The complexity is managed by integrating this step into the existing FAB process flow rather than adding a separate post-assembly testing stage
Data Source
AI summary
A method of manufacturing a semiconductor module is provided. The method includes forming semiconductor chips on a bare substrate, performing a burn-in process on the bare substrate including the semiconductor chips, sorting semiconductor chips that exceed a predetermined level of operability determined by testing electrical driving in the semiconductor chips on the burned-in bare substrate, separating the semiconductor chips from one another by cutting the bare substrate, and directly mounting the module semiconductor chips on a module substrate.