Semiconductor Module With Stacked Control Wiring
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Solution Overview
Problem
In power semiconductor modules, high switching speeds are hindered by significant gate-source inductance and its fluctuations, which can lead to semiconductor element deterioration or destruction due to surge voltages, necessitating a reduction in wiring inductance and its fluctuations.
Innovation Solution
A semiconductor module design featuring an insulating substrate with parallel columns of semiconductor elements and a control wiring substrate between them, where the gate and source wiring layers are arranged to cross the main current flow, reducing wire lengths and inductance, and utilizing a layout with multiple parallel current paths to minimize inductance and its fluctuations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional wiring layouts are used, then the module structure is simple, but the gate-source inductance is large and switching speed is limited
Solution Approach 1:
The patent transitions from planar wiring to three-dimensional stacked wiring architecture. The control wiring substrate is positioned between semiconductor element columns in the vertical dimension, allowing gate and source wirings to extend in the vertical direction while crossing main current flow paths horizontally. This dimensional transition reduces wire lengths and gate-source inductance without complicating the overall module layout.
Solution Approach 2:
The wiring system is segmented into distinct functional layers: main wiring layers for current flow on the insulating substrate, and control wiring layers on a separate control wiring substrate for gate and source connections. This segmentation allows independent optimization of each wiring system, reducing interference between main current and control signals while minimizing gate-source inductance.
2Loss of energy
If wiring inductance is reduced, then switching speed increases, but wiring layout becomes more complex
Solution Approach 1:
The gate wiring layer and source wiring layer are merged onto a single control wiring substrate, which is then integrated into the module structure between semiconductor element columns. This merging approach reduces the total number of separate wiring components and simplifies the overall structure while achieving reduced gate-source inductance through the optimized three-dimensional wiring paths.
3Productivity
If gate-source inductance is reduced, then switching speed increases, but the wiring structure becomes more complex
Solution Approach 1:
The control wiring substrate introduces a vertical dimension to the wiring architecture, with gate and source wirings extending vertically between semiconductor elements while main current flows horizontally. This three-dimensional arrangement reduces wire lengths and gate-source inductance, enabling higher switching frequencies without proportionally increasing wiring complexity.
Data Source
AI summary
A semiconductor module includes an insulating substrate having a main wiring layer, positive and negative electrode terminals adjacently arranged in a first direction, a plurality of semiconductor elements forming a first column and another plurality of semiconductor elements forming a second column, each semiconductor element having gate and source electrode on an upper surface thereof, and being disposed on the main wiring layer such that corresponding ones of the gate electrodes in the first and second columns face each other in a second direction orthogonal to the first direction, a control wiring substrate between the first and second columns and having gate and source wiring layers, a gate wiring member connecting ones of the gate electrodes in the first and second columns through the gate wiring layer, and a source wiring member connecting ones of the source electrodes in the first and second columns through the source wiring layer.