Power Semiconductor Module Terminal Arrangement

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Solution Overview

Problem

Conventional power semiconductor modules face issues with high parasitic inductance, leading to surge voltage and potential destruction of components, as well as increased cost and reduced power cycle life due to complex structures and uneven current distribution among parallel circuits.

Innovation Solution

The power semiconductor module design features self-arc-extinguishing type semiconductor elements connected in series with closely disposed positive and negative DC terminals and AC terminals, reducing inductance variation and enhancing current equality by minimizing the length of external bus bars and using a ceramic insulation layer for heat radiation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If external terminals are disposed separately at two opposing sides of the exterior case, then ease of connection is improved, but parasitic inductance increases and surge voltage rises

Engineering Contradiction:
Improveease of connectionVSAvoidsurge voltage
Core Design Contradiction:
Ease of operationVSObject-affected harmful factors

Solution Approach 1:

The patent merges the positive electrode side DC terminal and negative electrode side DC terminal into a closely disposed arrangement, reducing the loop area and parasitic inductance of the external bus bar connection, thereby lowering surge voltage while maintaining ease of connection

Inventive Principle:
Principle #5Merging (Combining)

2Ease of operation

If external terminals are disposed separately at two opposing sides of the exterior case, then ease of connection is improved, but inductance variation occurs and current distribution becomes unbalanced

Engineering Contradiction:
Improveease of connectionVSAvoidcurrent distribution uniformity
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent merges the terminal arrangement to minimize inductance variation between parallel circuits, ensuring balanced current distribution across all power semiconductor elements while maintaining connection ease

Inventive Principle:
Principle #5Merging (Combining)

3Object-affected harmful factors

If terminals are stacked vertically to reduce parasitic inductance, then inductance is reduced, but insulation requirements increase and structure becomes complicated

Engineering Contradiction:
Improveparasitic inductanceVSAvoidstructure complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent merges the positive and negative electrode terminals in a closely disposed arrangement that achieves low inductance without requiring vertical stacking, thereby simplifying the exterior case structure and reducing insulation requirements

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design effectively reduces inductance and surge voltage, improves reliability, and lowers costs by simplifying the module structure while ensuring equal current distribution across the module, thereby extending the power cycle life and reducing the risk of component destruction.

Implementation Method 1

a wiring pattern is formed over a metal plate, serving as a heat radiation plate, through an insulation layer

Methodology Applied
Scientific EffectThermal radiation: Thermal Radiation

Data Source

PatentUS9979314B2Power semiconductor module and power conversion device
Publication Date: 2018.05.22 MITSUBISHI ELECTRIC CORP
  • US9979314B2 patent drawing
  • US9979314B2 patent drawing
  • US9979314B2 patent drawing

AI summary

A power semiconductor module capable of reducing variation of inductance between upper/lower arms and reducing variation of current caused by the variation of inductance. The power semiconductor module includes circuit blocks (upper/lower arms) each of which is configured by connecting self-arc-extinguishing type semiconductor elements in series; a positive electrode terminal, a negative electrode terminal, and an AC terminal that are connected to each of the circuit blocks; and wiring patterns that connect the self-arc-extinguishing type semiconductor elements of the circuit blocks to the positive electrode terminal, the negative electrode terminal, and the AC terminal, wherein the circuit block is plural in number; the positive electrode terminal, the negative electrode terminal, and the AC terminal are each disposed to be plural in number corresponding to the circuit blocks; and the positive electrode terminals and the negative electrode terminals are closely disposed.