Semiconductor Module with Direct-Bonded Electrode Plates
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Solution Overview
Problem
Large-capacity semiconductor modules face increased parasitic inductance due to long wiring lengths, leading to surge voltages during high switching speeds, and existing solutions are unsuitable for large-capacity products with multiple parallel arrangements, affecting assembly performance and heat dispersion.
Innovation Solution
A semiconductor module design featuring first and second semiconductor elements connected in series with direct bonding of electrode plates to metal patterns on insulating substrates, reducing wiring length and components, and improving assembly performance and heat dispersion by forming AC and N electrode wirings as single electrode plates, which are directly bonded to semiconductor elements without intermediate wires.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the wiring length is increased to accommodate multiple components and parallel arrangements, then the current carrying capacity is improved, but the parasitic inductance increases leading to surge voltages
Solution Approach 1:
The patent transitions from planar wiring on insulating substrates to three-dimensional electrode plate arrangements. Multiple electrode plates are stacked vertically with direct bonding, creating parallel current paths in the vertical dimension. This reduces the horizontal wiring length while maintaining current carrying capacity through increased vertical current path density.
Solution Approach 2:
The patent merges multiple wiring functions into integrated electrode plates. The electrode plates serve multiple purposes: current conduction, structural support, and thermal management. By combining these functions into single consolidated components rather than separate wiring elements, the patent reduces overall inductance while maintaining power handling capability.
2Object-affected harmful factors
If multiple insulating substrates are overlaid to create parallel current paths, then the inductance is reduced, but the assembly complexity and manufacturing process increases
Solution Approach 1:
The patent consolidates multiple insulating substrate layers into a single integrated structure with electrode plates directly bonded to semiconductor elements. This eliminates the need for complex multi-layer substrate assembly while achieving the same low-inductance parallel current path effect through vertical electrode plate stacking.
Solution Approach 2:
The patent extracts the essential function of parallel current paths from the complex multi-substrate structure and implements it through simpler direct electrode plate bonding. By removing unnecessary intermediate substrates and wiring layers, the patent achieves low inductance with reduced assembly complexity.
3Adaptability or versatility
If wire bonding is used to connect electrode plates to semiconductor elements, then the wiring flexibility is improved, but the assembly performance and throughput decreases
Solution Approach 1:
The patent replaces the mechanical wire bonding process with direct metallurgical bonding of electrode plates to semiconductor elements. This substitution eliminates the time-consuming wire bonding steps while achieving equivalent or superior electrical connection. The direct bonding approach enables higher throughput and better assembly performance.
4Ease of operation
If the double-layer structure of insulating substrates is used, then the current path routing is improved, but the heat dispersion properties deteriorate
Solution Approach 1:
The patent uses composite structures combining semiconductor elements with directly bonded electrode plates and integrated heat sinks. This composite design creates efficient thermal pathways from the semiconductor elements through the electrode plates to the heat sink, improving heat dispersion while maintaining flexible current path routing capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design reduces inductance, improves assembly performance, and enhances heat dissipation, making it suitable for high-current applications by minimizing thermal resistance and component count while maintaining low inductance.
Implementation Method 1
The first electrode plate 2 and the third electrode plate 3 are directly bonded to the semiconductor elements without a member such as a wire located therebetween
Implementation Method 2
the first, second, and third electrode plates dissipate heat. This contributes to the reduced thermal resistance
Implementation Method 3
The wiring of the AC electrode and the wiring of the N electrode can be formed as the single third electrode plate and the single first electrode plate, respectively... The first electrode plate and the second metal pattern that is in connection with the second electrode plate are wired in parallel with each other. This can further reduce the inductance between the P electrode and the N electrode
Data Source
AI summary
A semiconductor module includes first and second semiconductor elements connected in series, an insulating substrate, first and second metal patterns formed on a first main surface and a second main surface of the insulating substrate, and first, second, and third electrode plates. A lower surface electrode and an upper surface electrode of the first semiconductor element are bonded to the first metal pattern and the first electrode plate, respectively. The first metal pattern and the third electrode plate are bonded together. An upper surface electrode of the second semiconductor element is bonded to the third electrode plate. A lower surface electrode of the second semiconductor element is electrically connected to the second metal pattern. The second metal pattern and the second electrode plate are bonded together. One end of the first electrode plate and one end of the second electrode plate are led out on the same side.