Semiconductor Module Arrangement for Fast Switching and Low Overshoot

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Semiconductor module arrangements face challenges in achieving fast switching of controllable semiconductor elements while minimizing overall losses and preventing voltage overshoot during switch-off, which requires a solution to reduce stray inductance and manage energy storage effectively.

Innovation Solution

The semiconductor module arrangement includes a first inductive element coupled between output terminals, a controllable semiconductor element, a capacitive element, and a diode in parallel, where the capacitive element is charged during switch-on and stores energy from the inductive element, reducing stray inductance and minimizing voltage overshoot by commutating energy through the diode during switch-off.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If fast switching of controllable semiconductor elements is implemented, then switching speed is improved, but voltage overshoot and losses increase

Engineering Contradiction:
Improveswitching speedVSAvoidvoltage overshoot
Core Design Contradiction:
SpeedVSObject-affected harmful factors

Solution Approach 1:

The patent introduces a first capacitive element as an intermediary component between the inductive element and the controllable semiconductor element. This capacitor acts as a mediator that absorbs voltage overshoot during switching operations, enabling fast switching while preventing harmful voltage spikes. The capacitor temporarily stores excess energy during switch-off, protecting the semiconductor element from voltage damage.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent implements beforehand cushioning by pre-charging the first capacitive element before switching operations. The capacitor is configured to absorb and cushion the voltage overshoot that occurs during fast switching off of the controllable semiconductor element. This preparatory energy storage mechanism prevents voltage spikes before they can damage the semiconductor components.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Productivity

If fast switching is implemented, then productivity is improved, but energy losses increase

Engineering Contradiction:
Improveswitching frequencyVSAvoidswitching losses
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent converts the harmful effect of inductive energy that causes voltage overshoot and losses into a beneficial mechanism. The first capacitive element captures the energy that would otherwise be lost as voltage overshoot during fast switching. By redirecting this energy into the capacitor, the system enables high-speed switching while recovering and storing the energy that would normally be wasted, thus converting a harmful factor into a useful energy storage mechanism.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Device complexity

If conventional switching circuits are used, then device complexity is low, but voltage overshoot and losses are high

Engineering Contradiction:
Improvecircuit structureVSAvoidswitching losses
Core Design Contradiction:
Device complexityVSLoss of energy

Solution Approach 1:

The patent segments the switching circuit into distinct functional components: a controllable semiconductor element for switching control, a first inductive element for energy storage, and a first capacitive element for overshoot suppression. This segmentation allows each component to perform its specific function optimally, enabling low-loss fast switching while maintaining relatively simple overall circuit structure. The modular segmentation makes the complex switching operation manageable and efficient.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enables fast switching with reduced switching losses and lower voltage overshoot, ensuring the semiconductor module can handle high voltage conditions effectively.

Implementation Method 1

the first inductive element is charged during the switch on operation of the at least one controllable semiconductor element

Methodology Applied
Scientific EffectElectromagnetic induction: Electromagnetic Induction

Implementation Method 2

energy that is stored in the first inductive element during the switch on operation commutates to the first capacitive element via the first diode element once the switch on operation is completed

Methodology Applied
Scientific EffectElectromagnetic commutation: Electromagnetic Induction

Data Source

PatentUS11398768B2Semiconductor module arrangement with fast switching, reduced losses, and low voltage overshoot and method for operating the same
Publication Date: 2022.07.26 INFINEON TECHNOLOGIES AG
  • US11398768B2 patent drawing
  • US11398768B2 patent drawing
  • US11398768B2 patent drawing

AI summary

A semiconductor module arrangement includes an input stage including a first output terminal and a second output terminal, wherein a first inductive element is coupled to the first output terminal; an output stage including at least one first controllable semiconductor element, a third input terminal coupled to the first inductive element such that the first inductive element is coupled between the first output terminal and the third input terminal, a fourth input terminal coupled to the second output terminal, a third output terminal, and a fourth output terminal; a second controllable semiconductor element and a first capacitive element coupled in series and between a first common node coupled between the first inductive element and the third input terminal, and a second common node coupled between the second output terminal and the fourth input terminal; and a first diode element coupled in parallel to the second controllable semiconductor element.