Semiconductor Module Parasitic Inductance Reduction

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Solution Overview

Problem

Existing semiconductor modules face challenges in reducing parasitic inductance, which hinders increased switching speed due to high parasitic inductance and noise, and previous solutions do not effectively cancel out magnetic flux or eliminate parasitic inductance at terminals.

Innovation Solution

A semiconductor module design featuring plate-shaped leadframes with insulating material integration and direct jointing of leadframes and semiconductor elements, where leadframes face each other with insulating material in between, reducing parasitic inductance by canceling out magnetic flux changes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If the switching speed of semiconductor elements is increased to reduce loss, then energy efficiency is improved, but parasitic inductance causes surge voltage and noise that hinder further speed increases

Engineering Contradiction:
ImprovelossVSAvoidsurge voltage and noise
Core Design Contradiction:
Loss of energyVSObject-affected harmful factors

Solution Approach 1:

The patent applies the principle of converting harmful magnetic flux into beneficial cancellation by positioning leadframes with opposite current directions facing each other. The magnetic fluxes generated by currents flowing in opposite directions through the facing leadframes cancel each other out, transforming the harmful effect of magnetic flux into a beneficial inductance reduction mechanism that enables higher switching speeds with lower surge voltage and noise

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

2Object-affected harmful factors

If wire or conventional conductor paths are used to form current loops, then circuit connectivity is achieved, but the parasitic inductance of the wire itself prevents sufficient inductance reduction

Engineering Contradiction:
Improveparasitic inductanceVSAvoidconductor selection
Core Design Contradiction:
Object-affected harmful factorsVSEase of manufacture

Solution Approach 1:

The patent extracts the current-carrying function from traditional wires and transfers it to the leadframes themselves. By making the leadframes the primary current paths rather than using separate wires, the design eliminates the parasitic inductance associated with wire connections while maintaining circuit connectivity and simplifying the overall structure

Inventive Principle:
Principle #2Taking out (Extraction)

3Object-affected harmful factors

If terminals and fixing members are interposed between current paths and semiconductor elements, then electrical connection is established, but parasitic inductance remains in the interposed portions

Engineering Contradiction:
Improveparasitic inductanceVSAvoidnumber of interposed components
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent merges the functions of terminals, fixing members, and current paths into an integrated leadframe structure. The leadframes directly contact the semiconductor elements while serving as both structural support and current-carrying paths, eliminating the need for separate terminals and fixing members and thereby removing the parasitic inductance that would be present in those interposed components

Inventive Principle:
Principle #5Merging (Combining)

4Object-affected harmful factors

If leadframes are made thicker or wider to reduce parasitic inductance, then inductance reduction is achieved, but module size increases contrary to miniaturization goals

Engineering Contradiction:
Improveparasitic inductanceVSAvoidmodule size
Core Design Contradiction:
Object-affected harmful factorsVSVolume of moving object

Solution Approach 1:

The patent uses the principle of magnetic flux cancellation by positioning leadframes with opposite current directions facing each other in close proximity. This allows thin leadframes to achieve low parasitic inductance through the cancellation effect rather than relying on increased thickness or width, thus reducing module size while maintaining low inductance performance

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design effectively reduces parasitic inductance, leading to lower surge voltage and noise, thereby increasing switching speed and minimizing module size and loss, while avoiding the need for thick or wide leadframes that contradict miniaturization.

Implementation Method 1

causing a conductor, which serves as a current path and to which a positive DC potential is applied, and another conductor, which serves as a current path and to which a negative DC potential is applied, to face each other such that currents flow through these conductors in opposite direction, thereby canceling out the magnetic fluxes

Methodology Applied
Scientific EffectMagnetic flux cancellation: Electromagnetic Induction

Data Source

PatentUS10804186B2Semiconductor module and power converter
Publication Date: 2020.10.13 MITSUBISHI ELECTRIC CORP
  • US10804186B2 patent drawing
  • US10804186B2 patent drawing
  • US10804186B2 patent drawing

AI summary

Provided are a semiconductor module capable of further increasing an effect of canceling out a parasitic inductance by a current and a power converter including the semiconductor module. The semiconductor module includes a first leadframe, a second leadframe, a third leadframe, an insulating material, a first semiconductor element, and a second semiconductor element. The first leadframe is a plate-shaped wiring path to which a first potential is applied. The second leadframe is a plate-shaped wiring path including an output terminal. The third leadframe is a plate-shaped wiring path to which a second potential is applied. The first semiconductor element is directly joined to the first leadframe with a joint material therebetween, and the second semiconductor element is directly joined to the second leadframe with a joint material therebetween. The first leadframe and the second leadframe face each other with the insulating material therebetween.