Semiconductor Module Lead Frame Design for Inductance Reduction
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Solution Overview
Problem
Semiconductor modules face challenges in reducing internal inductance, which can lead to imbalanced current distribution and erroneous switching in power semiconductor elements, particularly in high-capacity chips with large current flows.
Innovation Solution
The semiconductor module design incorporates a first and second lead frame with specific configurations, including plate-shaped portions, extension portions, and slit portions, arranged in parallel and facing each other to minimize inductance and enhance heat dissipation, thereby reducing inductance imbalance and improving current distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional lead frame structures are used to connect semiconductor chips, then the module can be manufactured with standard designs, but the internal inductance remains high causing current imbalance and erroneous switching
Solution Approach 1:
The lead frame is divided into multiple independent lead frames (first lead frame, second lead frame, etc.), each connected to specific semiconductor chips. This segmentation allows independent optimization of current paths for each lead frame, reducing overall internal inductance and preventing current imbalance that would cause erroneous switching.
Solution Approach 2:
The lead frames are arranged in a three-dimensional configuration with extension portions extending in upward or downward directions, and facing portions positioned to face each other. This spatial arrangement creates multiple current paths through different dimensions, reducing internal inductance by distributing current flow across multiple spatial pathways rather than confined to a single plane.
2Reliability
If lead frames are arranged to reduce inductance, then switching accuracy improves, but the structural complexity of the lead frame increases
Solution Approach 1:
Each lead frame is designed as a multi-functional component that simultaneously serves as an electrical connector, a current path, and a structural support element. The lead frames include plate-shaped portions for mechanical support, extension portions for electrical connection, and facing portions for inductance reduction, all integrated into single components rather than separate parts.
Solution Approach 2:
Multiple functional elements are merged into unified lead frame structures. The plate-shaped portion, extension portion, and facing portion are integrated into single lead frames that perform multiple functions simultaneously, reducing the total number of discrete components while achieving the desired current distribution and inductance reduction.
3Reliability
If multiple lead frames are used to distribute current, then inductance imbalance is reduced, but the manufacturing process becomes more complex
Solution Approach 1:
The lead frames are designed with symmetric arrangements where facing portions of different lead frames are positioned to face each other at comparable distances. This creates equipotential conditions for current flow paths, ensuring that current distributes uniformly across all semiconductor chips by providing equal electrical pathways, which simplifies manufacturing by eliminating the need for complex adjustments.
4Temperature
If lead frames with extension portions are used to reduce inductance, then thermal management is improved, but the volume of the module increases
Solution Approach 1:
The extension portions of the lead frames serve dual functions: they provide extended current paths that reduce internal inductance and simultaneously act as heat dissipation structures. By making the lead frames multi-functional, the design achieves improved thermal management without adding separate heat sinks or cooling components that would increase module volume.
Data Source
AI summary
A semiconductor module includes: a first lead frame connected to a plurality of semiconductor chips in a first arm circuit; a second lead frame connected to a plurality of semiconductor chips in a second arm circuit; a first main terminal connected to the first lead frame; and a second main terminal connected to the second lead frame, wherein each of the first lead frame and second lead frame has a facing part, a first terminal connection portion connected to the first main terminal is provided at a first end portion of the first lead frame, a second terminal connection portion connected to the second main terminal is provided at a second end portion of the second lead frame, and the first terminal connection portion and second terminal connection portion are arranged on opposite sides when viewed from the facing parts of the first lead frame and second lead frame.


