Semiconductor Module Layout for Electromagnetic Noise Suppression
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Solution Overview
Problem
Semiconductor modules experience malfunctions due to significant variations in current flowing through conductive patterns, causing electromagnetic induction that affects gate voltage and leads to noise, resulting in potential malfunctions.
Innovation Solution
The semiconductor module design includes a first and second switching device coupled in series, with specific terminal and conductive pattern configurations that separate the main current flow from control terminals, reducing the influence of electromagnetic induction by optimizing the layout and placement of components within a quadrangular casing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If control terminals and sense terminals are placed close to switching devices for compact layout, then device complexity is reduced, but electromagnetic induction from main current causes noise and malfunctions
Solution Approach 1:
The patent divides the module into distinct functional zones: a first region for main current flow (positive terminal to negative terminal) and a second region for control signals (control terminals and sense terminals). This spatial segmentation separates high-current paths from low-voltage control paths, reducing electromagnetic interference while maintaining a compact overall structure.
Solution Approach 2:
The patent utilizes the vertical dimension (thickness direction) to further separate conductive patterns. Control conductive patterns are positioned at different heights from main current conductive patterns, creating vertical isolation that reduces electromagnetic induction effects while keeping the planar layout compact.
2Productivity
If conductive patterns are placed close together to reduce module size, then productivity increases, but electromagnetic induction causes malfunctions
Solution Approach 1:
The patent segments the conductive patterns into main current paths and control signal paths that are spatially separated. By dividing the electrical pathways into distinct regions with different functional requirements, the design achieves compact sizing while preventing harmful electromagnetic induction between adjacent patterns.
Solution Approach 2:
The patent introduces ground conductive patterns as intermediary elements between main current paths and control signal paths. These ground patterns act as electromagnetic shields, absorbing or redirecting interference fields and protecting sensitive control circuits from noise generated by high-current switching operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses malfunctions by minimizing the impact of electromagnetic induction, allowing for stable operation and efficient current flow through the module.
Implementation Method 1
when variation in a current flowing through a conductive pattern (main current) is large, the influence of electromagnetic induction (noise) may cause the semiconductor module to malfunction
Data Source
AI summary
A semiconductor module includes: first and second switching devices coupled in series; a casing housing the first and second switching devices, and having first to fourth edges respectively on first to forth edge sides thereof; positive and negative terminals provided on the first edge side of the casing; an output terminal provided on the second edge side of the casing; a first control terminal and a first sense terminal for the first switching device, and a second control terminal and a second sense terminal for the second switching device, all provided on the third edge side of the casing; first and second conductive patterns respectively coupled to the positive terminal and the output terminal, and on which the first and second switching device are respectively arranged; and a third conductive pattern coupled to the negative terminal and the second switching device, on a side corresponding to the fourth edge side.


