Semiconductor Module Arrangement With Opposing Potentials
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Solution Overview
Problem
Power semiconductor module arrangements face challenges in achieving satisfactory electromagnetic compatibility (EMC) and meeting insulation voltage requirements, especially for high reverse voltage classes, while being easy to manufacture without additive manufacturing steps.
Innovation Solution
The semiconductor module arrangement incorporates a housing with pairs of semiconductor substrates, each featuring dielectric insulation layers and metallization layers, where the third metallization layer of one substrate is electrically coupled to a first potential and the third metallization layer of the other substrate is coupled to an opposite second potential, facilitating efficient electrical connections and insulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional single-layer substrate structures are used, then manufacturing is simpler, but electromagnetic compatibility and insulation voltage requirements cannot be satisfied
Solution Approach 1:
The substrate is divided into multiple layers (first substrate layer, second substrate layer, third substrate layer) with distinct functions. The first layer provides mechanical support, the second layer provides electrical insulation, and the third layer provides additional electrical connection and shielding. This segmentation allows each layer to be optimized for its specific function, thereby satisfying both EMC and insulation voltage requirements while maintaining manufacturability through standard lamination processes
Solution Approach 2:
A dedicated second substrate layer made of electrically insulating material is introduced as an intermediary between the first and third substrate layers. This intermediate layer acts as an electrical insulator that prevents parasitic coupling between adjacent conductive elements on different layers, thereby improving electromagnetic compatibility without requiring complex 3D structuring or additive manufacturing
2Reliability
If additive manufacturing steps are used to achieve complex insulation structures, then insulation voltage requirements can be met, but manufacturing complexity and cost increase
Solution Approach 1:
The insulation function is segmented into a dedicated second substrate layer that is laminated between the first and third substrate layers. This layer can be manufactured separately using conventional PCB lamination techniques and then assembled into the final multi-layer structure, avoiding the need for complex additive manufacturing steps while still achieving the required insulation voltage levels
Solution Approach 2:
The second substrate layer serves multiple functions simultaneously: it provides electrical insulation between high-voltage and low-voltage circuits, provides mechanical support for mounting semiconductor devices, and provides a pathway for thermal management. This multi-functionality is achieved through a single manufacturable layer using conventional lamination processes
3Reliability
If multiple dielectric insulation layers with opposite electrical potentials are implemented, then electromagnetic compatibility improves, but device complexity increases
Solution Approach 1:
The metallization structure is segmented into three distinct layers: first metallization layer for primary electrical connections, second metallization layer for high-voltage connections, and third metallization layer for low-voltage connections and shielding. Each metallization layer is separated by dedicated dielectric insulation layers, allowing independent optimization of each layer's function while maintaining overall EMC performance through standardized manufacturing processes
Solution Approach 2:
The third metallization layer is configured to be electrically coupled to a first electrical potential while the second metallization layer is coupled to a second electrical potential that is opposite to the first potential. This equipotential configuration creates symmetrical voltage distribution that reduces electromagnetic interference and parasitic coupling, improving EMC without requiring asymmetric or complex 3D metallization structures
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances electromagnetic compatibility and meets insulation voltage requirements, simplifying manufacturing processes and ensuring reliable performance for high reverse voltage applications.
Implementation Method 1
Each of the first and second semiconductor substrates includes a first dielectric insulation layer arranged between the first metallization layer and the third metallization layer, and a second dielectric insulation layer arranged between the third metallization layer and the second metallization layer
Data Source
AI summary
A semiconductor module arrangement includes a housing and at least one pair of semiconductor substrates arranged inside the housing. Each pair of semiconductor substrates includes first and second semiconductor substrates. The first semiconductor substrate includes a first dielectric insulation layer arranged between a first metallization layer and a third metallization layer, and a second dielectric insulation layer arranged between the third metallization layer and a second metallization layer. The second semiconductor substrate includes a first dielectric insulation layer arranged between a first metallization layer and a third metallization layer, and a second dielectric insulation layer arranged between the third metallization layer and a second metallization layer. The third metallization layer of the first semiconductor substrate is electrically coupled to a first electrical potential, and the third metallization layer of the second semiconductor substrate is electrically coupled to a second electrical potential that is opposite to the first electrical potential.